Module lpc82x_pac::adc0::ctrl [−][src]
Expand description
ADC Control register. Contains the clock divide value, resolution selection, sampling time selection, and mode controls.
Structs
Field CALMODE reader - Writing a ‘1’ to this bit will initiate a sef-calibration cycle. This bit will be automatically cleared by hardware after the calibration cycle is complete. Note: Other bits of this register may be written to concurrently with setting this bit, however once this bit has been set no further writes to this register are permitted unitl the full calibration cycle has ended.
Field CALMODE writer - Writing a ‘1’ to this bit will initiate a sef-calibration cycle. This bit will be automatically cleared by hardware after the calibration cycle is complete. Note: Other bits of this register may be written to concurrently with setting this bit, however once this bit has been set no further writes to this register are permitted unitl the full calibration cycle has ended.
Field CLKDIV reader - In synchronous mode only, the system clock is divided by this value plus one to produce the clock for the ADC converter, which should be less than or equal to 72 MHz. Typically, software should program the smallest value in this field that yields this maximum clock rate or slightly less, but in certain cases (such as a high-impedance analog source) a slower clock may be desirable. This field is ignored in the asynchronous operating mode.
Field CLKDIV writer - In synchronous mode only, the system clock is divided by this value plus one to produce the clock for the ADC converter, which should be less than or equal to 72 MHz. Typically, software should program the smallest value in this field that yields this maximum clock rate or slightly less, but in certain cases (such as a high-impedance analog source) a slower clock may be desirable. This field is ignored in the asynchronous operating mode.
ADC Control register. Contains the clock divide value, resolution selection, sampling time selection, and mode controls.
Field LPWRMODE reader - The low-power ADC mode
Field LPWRMODE writer - The low-power ADC mode
Register CTRL reader
Register CTRL writer
Enums
The low-power ADC mode