[][src]Type Definition lpc82x_pac::adc0::inten::R

type R = R<u32, INTEN>;

Reader of register INTEN

Methods

impl R[src]

pub fn seqa_inten(&self) -> SEQA_INTEN_R[src]

Bit 0 - Sequence A interrupt enable.

pub fn seqb_inten(&self) -> SEQB_INTEN_R[src]

Bit 1 - Sequence B interrupt enable.

pub fn ovr_inten(&self) -> OVR_INTEN_R[src]

Bit 2 - Overrun interrupt enable.

pub fn adcmpinten0(&self) -> ADCMPINTEN0_R[src]

Bits 3:4 - Threshold comparison interrupt enable for channel 0.

pub fn adcmpinten1(&self) -> ADCMPINTEN1_R[src]

Bits 5:6 - Channel 1 threshold comparison interrupt enable.

pub fn adcmpinten2(&self) -> ADCMPINTEN2_R[src]

Bits 7:8 - Channel 2 threshold comparison interrupt enable.

pub fn adcmpinten3(&self) -> ADCMPINTEN3_R[src]

Bits 9:10 - Channel 3 threshold comparison interrupt enable.

pub fn adcmpinten4(&self) -> ADCMPINTEN4_R[src]

Bits 11:12 - Channel 4 threshold comparison interrupt enable.

pub fn adcmpinten5(&self) -> ADCMPINTEN5_R[src]

Bits 13:14 - Channel 5 threshold comparison interrupt enable.

pub fn adcmpinten6(&self) -> ADCMPINTEN6_R[src]

Bits 15:16 - Channel 6 threshold comparison interrupt enable.

pub fn adcmpinten7(&self) -> ADCMPINTEN7_R[src]

Bits 17:18 - Channel 7 threshold comparison interrupt enable.

pub fn adcmpinten8(&self) -> ADCMPINTEN8_R[src]

Bits 19:20 - Channel 8 threshold comparison interrupt enable.

pub fn adcmpinten9(&self) -> ADCMPINTEN9_R[src]

Bits 21:22 - Channel 9 threshold comparison interrupt enable.

pub fn adcmpinten10(&self) -> ADCMPINTEN10_R[src]

Bits 23:24 - Channel 10 threshold comparison interrupt enable.

pub fn adcmpinten11(&self) -> ADCMPINTEN11_R[src]

Bits 25:26 - Channel 11 threshold comparison interrupt enable.