#[doc = r" Value read from the register"]
pub struct R {
bits: u32,
}
#[doc = r" Value to write to the register"]
pub struct W {
bits: u32,
}
impl super::SYSAHBCLKCTRL {
#[doc = r" Modifies the contents of the register"]
#[inline]
pub fn modify<F>(&self, f: F)
where
for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
{
let bits = self.register.get();
let r = R { bits: bits };
let mut w = W { bits: bits };
f(&r, &mut w);
self.register.set(w.bits);
}
#[doc = r" Reads the contents of the register"]
#[inline]
pub fn read(&self) -> R {
R {
bits: self.register.get(),
}
}
#[doc = r" Writes to the register"]
#[inline]
pub fn write<F>(&self, f: F)
where
F: FnOnce(&mut W) -> &mut W,
{
let mut w = W::reset_value();
f(&mut w);
self.register.set(w.bits);
}
#[doc = r" Writes the reset value to the register"]
#[inline]
pub fn reset(&self) {
self.write(|w| w)
}
}
#[doc = "Possible values of the field `SYS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SYSR {
#[doc = "Enable"]
ENABLE,
}
impl SYSR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
SYSR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> SYSR {
match value {
true => SYSR::ENABLE,
_ => unreachable!(),
}
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == SYSR::ENABLE
}
}
#[doc = "Possible values of the field `ROM`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ROMR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl ROMR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
ROMR::DISABLE => false,
ROMR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> ROMR {
match value {
false => ROMR::DISABLE,
true => ROMR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == ROMR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == ROMR::ENABLE
}
}
#[doc = "Possible values of the field `RAM`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RAMR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl RAMR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
RAMR::DISABLE => false,
RAMR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> RAMR {
match value {
false => RAMR::DISABLE,
true => RAMR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == RAMR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == RAMR::ENABLE
}
}
#[doc = "Possible values of the field `FLASHREG`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FLASHREGR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl FLASHREGR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FLASHREGR::DISABLE => false,
FLASHREGR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FLASHREGR {
match value {
false => FLASHREGR::DISABLE,
true => FLASHREGR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == FLASHREGR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == FLASHREGR::ENABLE
}
}
#[doc = "Possible values of the field `FLASH`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FLASHR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl FLASHR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
FLASHR::DISABLE => false,
FLASHR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> FLASHR {
match value {
false => FLASHR::DISABLE,
true => FLASHR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == FLASHR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == FLASHR::ENABLE
}
}
#[doc = "Possible values of the field `I2C`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum I2CR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl I2CR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
I2CR::DISABLE => false,
I2CR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> I2CR {
match value {
false => I2CR::DISABLE,
true => I2CR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == I2CR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == I2CR::ENABLE
}
}
#[doc = "Possible values of the field `GPIO`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum GPIOR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl GPIOR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
GPIOR::DISABLE => false,
GPIOR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> GPIOR {
match value {
false => GPIOR::DISABLE,
true => GPIOR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == GPIOR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == GPIOR::ENABLE
}
}
#[doc = "Possible values of the field `SWM`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SWMR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl SWMR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
SWMR::DISABLE => false,
SWMR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> SWMR {
match value {
false => SWMR::DISABLE,
true => SWMR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == SWMR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == SWMR::ENABLE
}
}
#[doc = "Possible values of the field `SCT`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SCTR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl SCTR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
SCTR::DISABLE => false,
SCTR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> SCTR {
match value {
false => SCTR::DISABLE,
true => SCTR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == SCTR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == SCTR::ENABLE
}
}
#[doc = "Possible values of the field `WKT`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WKTR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl WKTR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
WKTR::DISABLE => false,
WKTR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> WKTR {
match value {
false => WKTR::DISABLE,
true => WKTR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == WKTR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == WKTR::ENABLE
}
}
#[doc = "Possible values of the field `MRT`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MRTR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl MRTR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
MRTR::DISABLE => false,
MRTR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> MRTR {
match value {
false => MRTR::DISABLE,
true => MRTR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == MRTR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == MRTR::ENABLE
}
}
#[doc = "Possible values of the field `SPI0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SPI0R {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl SPI0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
SPI0R::DISABLE => false,
SPI0R::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> SPI0R {
match value {
false => SPI0R::DISABLE,
true => SPI0R::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == SPI0R::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == SPI0R::ENABLE
}
}
#[doc = "Possible values of the field `SPI1`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SPI1R {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl SPI1R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
SPI1R::DISABLE => false,
SPI1R::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> SPI1R {
match value {
false => SPI1R::DISABLE,
true => SPI1R::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == SPI1R::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == SPI1R::ENABLE
}
}
#[doc = "Possible values of the field `CRC`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CRCR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl CRCR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
CRCR::DISABLE => false,
CRCR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> CRCR {
match value {
false => CRCR::DISABLE,
true => CRCR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == CRCR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == CRCR::ENABLE
}
}
#[doc = "Possible values of the field `UART0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UART0R {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl UART0R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
UART0R::DISABLE => false,
UART0R::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> UART0R {
match value {
false => UART0R::DISABLE,
true => UART0R::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == UART0R::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == UART0R::ENABLE
}
}
#[doc = "Possible values of the field `UART1`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UART1R {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl UART1R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
UART1R::DISABLE => false,
UART1R::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> UART1R {
match value {
false => UART1R::DISABLE,
true => UART1R::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == UART1R::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == UART1R::ENABLE
}
}
#[doc = "Possible values of the field `UART2`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UART2R {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl UART2R {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
UART2R::DISABLE => false,
UART2R::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> UART2R {
match value {
false => UART2R::DISABLE,
true => UART2R::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == UART2R::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == UART2R::ENABLE
}
}
#[doc = "Possible values of the field `WWDT`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WWDTR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl WWDTR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
WWDTR::DISABLE => false,
WWDTR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> WWDTR {
match value {
false => WWDTR::DISABLE,
true => WWDTR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == WWDTR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == WWDTR::ENABLE
}
}
#[doc = "Possible values of the field `IOCON`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IOCONR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl IOCONR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
IOCONR::DISABLE => false,
IOCONR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> IOCONR {
match value {
false => IOCONR::DISABLE,
true => IOCONR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == IOCONR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == IOCONR::ENABLE
}
}
#[doc = "Possible values of the field `ACMP`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ACMPR {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl ACMPR {
#[doc = r" Returns `true` if the bit is clear (0)"]
#[inline]
pub fn bit_is_clear(&self) -> bool {
!self.bit()
}
#[doc = r" Returns `true` if the bit is set (1)"]
#[inline]
pub fn bit_is_set(&self) -> bool {
self.bit()
}
#[doc = r" Value of the field as raw bits"]
#[inline]
pub fn bit(&self) -> bool {
match *self {
ACMPR::DISABLE => false,
ACMPR::ENABLE => true,
}
}
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _from(value: bool) -> ACMPR {
match value {
false => ACMPR::DISABLE,
true => ACMPR::ENABLE,
}
}
#[doc = "Checks if the value of the field is `DISABLE`"]
#[inline]
pub fn is_disable(&self) -> bool {
*self == ACMPR::DISABLE
}
#[doc = "Checks if the value of the field is `ENABLE`"]
#[inline]
pub fn is_enable(&self) -> bool {
*self == ACMPR::ENABLE
}
}
#[doc = "Values that can be written to the field `SYS`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SYSW {
#[doc = "Enable"]
ENABLE,
}
impl SYSW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
SYSW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _SYSW<'a> {
w: &'a mut W,
}
impl<'a> _SYSW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: SYSW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(SYSW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 0;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `ROM`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ROMW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl ROMW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
ROMW::DISABLE => false,
ROMW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _ROMW<'a> {
w: &'a mut W,
}
impl<'a> _ROMW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: ROMW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(ROMW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(ROMW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 1;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `RAM`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum RAMW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl RAMW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
RAMW::DISABLE => false,
RAMW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _RAMW<'a> {
w: &'a mut W,
}
impl<'a> _RAMW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: RAMW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(RAMW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(RAMW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 2;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FLASHREG`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FLASHREGW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl FLASHREGW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FLASHREGW::DISABLE => false,
FLASHREGW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FLASHREGW<'a> {
w: &'a mut W,
}
impl<'a> _FLASHREGW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FLASHREGW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(FLASHREGW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(FLASHREGW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 3;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `FLASH`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum FLASHW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl FLASHW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
FLASHW::DISABLE => false,
FLASHW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _FLASHW<'a> {
w: &'a mut W,
}
impl<'a> _FLASHW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: FLASHW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(FLASHW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(FLASHW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 4;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `I2C`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum I2CW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl I2CW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
I2CW::DISABLE => false,
I2CW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _I2CW<'a> {
w: &'a mut W,
}
impl<'a> _I2CW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: I2CW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(I2CW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(I2CW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 5;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `GPIO`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum GPIOW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl GPIOW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
GPIOW::DISABLE => false,
GPIOW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _GPIOW<'a> {
w: &'a mut W,
}
impl<'a> _GPIOW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: GPIOW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(GPIOW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(GPIOW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 6;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `SWM`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SWMW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl SWMW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
SWMW::DISABLE => false,
SWMW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _SWMW<'a> {
w: &'a mut W,
}
impl<'a> _SWMW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: SWMW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(SWMW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(SWMW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 7;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `SCT`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SCTW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl SCTW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
SCTW::DISABLE => false,
SCTW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _SCTW<'a> {
w: &'a mut W,
}
impl<'a> _SCTW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: SCTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(SCTW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(SCTW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 8;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `WKT`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WKTW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl WKTW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
WKTW::DISABLE => false,
WKTW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _WKTW<'a> {
w: &'a mut W,
}
impl<'a> _WKTW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: WKTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(WKTW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(WKTW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 9;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `MRT`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum MRTW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl MRTW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
MRTW::DISABLE => false,
MRTW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _MRTW<'a> {
w: &'a mut W,
}
impl<'a> _MRTW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: MRTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(MRTW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(MRTW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 10;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `SPI0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SPI0W {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl SPI0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
SPI0W::DISABLE => false,
SPI0W::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _SPI0W<'a> {
w: &'a mut W,
}
impl<'a> _SPI0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: SPI0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(SPI0W::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(SPI0W::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 11;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `SPI1`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum SPI1W {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl SPI1W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
SPI1W::DISABLE => false,
SPI1W::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _SPI1W<'a> {
w: &'a mut W,
}
impl<'a> _SPI1W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: SPI1W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(SPI1W::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(SPI1W::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 12;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `CRC`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum CRCW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl CRCW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
CRCW::DISABLE => false,
CRCW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _CRCW<'a> {
w: &'a mut W,
}
impl<'a> _CRCW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: CRCW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(CRCW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(CRCW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 13;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `UART0`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UART0W {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl UART0W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
UART0W::DISABLE => false,
UART0W::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _UART0W<'a> {
w: &'a mut W,
}
impl<'a> _UART0W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: UART0W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(UART0W::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(UART0W::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 14;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `UART1`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UART1W {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl UART1W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
UART1W::DISABLE => false,
UART1W::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _UART1W<'a> {
w: &'a mut W,
}
impl<'a> _UART1W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: UART1W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(UART1W::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(UART1W::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 15;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `UART2`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum UART2W {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl UART2W {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
UART2W::DISABLE => false,
UART2W::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _UART2W<'a> {
w: &'a mut W,
}
impl<'a> _UART2W<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: UART2W) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(UART2W::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(UART2W::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 16;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `WWDT`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum WWDTW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl WWDTW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
WWDTW::DISABLE => false,
WWDTW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _WWDTW<'a> {
w: &'a mut W,
}
impl<'a> _WWDTW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: WWDTW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(WWDTW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(WWDTW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 17;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `IOCON`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum IOCONW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl IOCONW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
IOCONW::DISABLE => false,
IOCONW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _IOCONW<'a> {
w: &'a mut W,
}
impl<'a> _IOCONW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: IOCONW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(IOCONW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(IOCONW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 18;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
#[doc = "Values that can be written to the field `ACMP`"]
#[derive(Clone, Copy, Debug, PartialEq)]
pub enum ACMPW {
#[doc = "Disable"]
DISABLE,
#[doc = "Enable"]
ENABLE,
}
impl ACMPW {
#[allow(missing_docs)]
#[doc(hidden)]
#[inline]
pub fn _bits(&self) -> bool {
match *self {
ACMPW::DISABLE => false,
ACMPW::ENABLE => true,
}
}
}
#[doc = r" Proxy"]
pub struct _ACMPW<'a> {
w: &'a mut W,
}
impl<'a> _ACMPW<'a> {
#[doc = r" Writes `variant` to the field"]
#[inline]
pub fn variant(self, variant: ACMPW) -> &'a mut W {
{
self.bit(variant._bits())
}
}
#[doc = "Disable"]
#[inline]
pub fn disable(self) -> &'a mut W {
self.variant(ACMPW::DISABLE)
}
#[doc = "Enable"]
#[inline]
pub fn enable(self) -> &'a mut W {
self.variant(ACMPW::ENABLE)
}
#[doc = r" Sets the field bit"]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r" Clears the field bit"]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r" Writes raw bits to the field"]
#[inline]
pub fn bit(self, value: bool) -> &'a mut W {
const MASK: bool = true;
const OFFSET: u8 = 19;
self.w.bits &= !((MASK as u32) << OFFSET);
self.w.bits |= ((value & MASK) as u32) << OFFSET;
self.w
}
}
impl R {
#[doc = r" Value of the register as raw bits"]
#[inline]
pub fn bits(&self) -> u32 {
self.bits
}
#[doc = "Bit 0 - Enables the clock for the AHB, the APB bridge, the Cortex-M0+ core clocks, SYSCON, and the PMU. This bit is read only and always reads as 1."]
#[inline]
pub fn sys(&self) -> SYSR {
SYSR::_from({
const MASK: bool = true;
const OFFSET: u8 = 0;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 1 - Enables clock for ROM."]
#[inline]
pub fn rom(&self) -> ROMR {
ROMR::_from({
const MASK: bool = true;
const OFFSET: u8 = 1;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 2 - Enables clock for SRAM."]
#[inline]
pub fn ram(&self) -> RAMR {
RAMR::_from({
const MASK: bool = true;
const OFFSET: u8 = 2;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 3 - Enables clock for flash register interface."]
#[inline]
pub fn flashreg(&self) -> FLASHREGR {
FLASHREGR::_from({
const MASK: bool = true;
const OFFSET: u8 = 3;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 4 - Enables clock for flash."]
#[inline]
pub fn flash(&self) -> FLASHR {
FLASHR::_from({
const MASK: bool = true;
const OFFSET: u8 = 4;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 5 - Enables clock for I2C."]
#[inline]
pub fn i2c(&self) -> I2CR {
I2CR::_from({
const MASK: bool = true;
const OFFSET: u8 = 5;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 6 - Enables clock for GPIO port registers and GPIO pin interrupt registers."]
#[inline]
pub fn gpio(&self) -> GPIOR {
GPIOR::_from({
const MASK: bool = true;
const OFFSET: u8 = 6;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 7 - Enables clock for switch matrix."]
#[inline]
pub fn swm(&self) -> SWMR {
SWMR::_from({
const MASK: bool = true;
const OFFSET: u8 = 7;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 8 - Enables clock for state configurable timer."]
#[inline]
pub fn sct(&self) -> SCTR {
SCTR::_from({
const MASK: bool = true;
const OFFSET: u8 = 8;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 9 - Enables clock for self wake-up timer."]
#[inline]
pub fn wkt(&self) -> WKTR {
WKTR::_from({
const MASK: bool = true;
const OFFSET: u8 = 9;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 10 - Enables clock for multi-rate timer."]
#[inline]
pub fn mrt(&self) -> MRTR {
MRTR::_from({
const MASK: bool = true;
const OFFSET: u8 = 10;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 11 - Enables clock for SPI0."]
#[inline]
pub fn spi0(&self) -> SPI0R {
SPI0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 11;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 12 - Enables clock for SPI1."]
#[inline]
pub fn spi1(&self) -> SPI1R {
SPI1R::_from({
const MASK: bool = true;
const OFFSET: u8 = 12;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 13 - Enables clock for CRC."]
#[inline]
pub fn crc(&self) -> CRCR {
CRCR::_from({
const MASK: bool = true;
const OFFSET: u8 = 13;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 14 - Enables clock for UART0."]
#[inline]
pub fn uart0(&self) -> UART0R {
UART0R::_from({
const MASK: bool = true;
const OFFSET: u8 = 14;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 15 - Enables clock for UART1."]
#[inline]
pub fn uart1(&self) -> UART1R {
UART1R::_from({
const MASK: bool = true;
const OFFSET: u8 = 15;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 16 - Enables clock for UART2."]
#[inline]
pub fn uart2(&self) -> UART2R {
UART2R::_from({
const MASK: bool = true;
const OFFSET: u8 = 16;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 17 - Enables clock for WWDT."]
#[inline]
pub fn wwdt(&self) -> WWDTR {
WWDTR::_from({
const MASK: bool = true;
const OFFSET: u8 = 17;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 18 - Enables clock for IOCON block."]
#[inline]
pub fn iocon(&self) -> IOCONR {
IOCONR::_from({
const MASK: bool = true;
const OFFSET: u8 = 18;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
#[doc = "Bit 19 - Enables clock to analog comparator."]
#[inline]
pub fn acmp(&self) -> ACMPR {
ACMPR::_from({
const MASK: bool = true;
const OFFSET: u8 = 19;
((self.bits >> OFFSET) & MASK as u32) != 0
})
}
}
impl W {
#[doc = r" Reset value of the register"]
#[inline]
pub fn reset_value() -> W {
W { bits: 31 }
}
#[doc = r" Writes raw bits to the register"]
#[inline]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.bits = bits;
self
}
#[doc = "Bit 0 - Enables the clock for the AHB, the APB bridge, the Cortex-M0+ core clocks, SYSCON, and the PMU. This bit is read only and always reads as 1."]
#[inline]
pub fn sys(&mut self) -> _SYSW {
_SYSW { w: self }
}
#[doc = "Bit 1 - Enables clock for ROM."]
#[inline]
pub fn rom(&mut self) -> _ROMW {
_ROMW { w: self }
}
#[doc = "Bit 2 - Enables clock for SRAM."]
#[inline]
pub fn ram(&mut self) -> _RAMW {
_RAMW { w: self }
}
#[doc = "Bit 3 - Enables clock for flash register interface."]
#[inline]
pub fn flashreg(&mut self) -> _FLASHREGW {
_FLASHREGW { w: self }
}
#[doc = "Bit 4 - Enables clock for flash."]
#[inline]
pub fn flash(&mut self) -> _FLASHW {
_FLASHW { w: self }
}
#[doc = "Bit 5 - Enables clock for I2C."]
#[inline]
pub fn i2c(&mut self) -> _I2CW {
_I2CW { w: self }
}
#[doc = "Bit 6 - Enables clock for GPIO port registers and GPIO pin interrupt registers."]
#[inline]
pub fn gpio(&mut self) -> _GPIOW {
_GPIOW { w: self }
}
#[doc = "Bit 7 - Enables clock for switch matrix."]
#[inline]
pub fn swm(&mut self) -> _SWMW {
_SWMW { w: self }
}
#[doc = "Bit 8 - Enables clock for state configurable timer."]
#[inline]
pub fn sct(&mut self) -> _SCTW {
_SCTW { w: self }
}
#[doc = "Bit 9 - Enables clock for self wake-up timer."]
#[inline]
pub fn wkt(&mut self) -> _WKTW {
_WKTW { w: self }
}
#[doc = "Bit 10 - Enables clock for multi-rate timer."]
#[inline]
pub fn mrt(&mut self) -> _MRTW {
_MRTW { w: self }
}
#[doc = "Bit 11 - Enables clock for SPI0."]
#[inline]
pub fn spi0(&mut self) -> _SPI0W {
_SPI0W { w: self }
}
#[doc = "Bit 12 - Enables clock for SPI1."]
#[inline]
pub fn spi1(&mut self) -> _SPI1W {
_SPI1W { w: self }
}
#[doc = "Bit 13 - Enables clock for CRC."]
#[inline]
pub fn crc(&mut self) -> _CRCW {
_CRCW { w: self }
}
#[doc = "Bit 14 - Enables clock for UART0."]
#[inline]
pub fn uart0(&mut self) -> _UART0W {
_UART0W { w: self }
}
#[doc = "Bit 15 - Enables clock for UART1."]
#[inline]
pub fn uart1(&mut self) -> _UART1W {
_UART1W { w: self }
}
#[doc = "Bit 16 - Enables clock for UART2."]
#[inline]
pub fn uart2(&mut self) -> _UART2W {
_UART2W { w: self }
}
#[doc = "Bit 17 - Enables clock for WWDT."]
#[inline]
pub fn wwdt(&mut self) -> _WWDTW {
_WWDTW { w: self }
}
#[doc = "Bit 18 - Enables clock for IOCON block."]
#[inline]
pub fn iocon(&mut self) -> _IOCONW {
_IOCONW { w: self }
}
#[doc = "Bit 19 - Enables clock to analog comparator."]
#[inline]
pub fn acmp(&mut self) -> _ACMPW {
_ACMPW { w: self }
}
}