[−][src]Type Definition lpc55s6x_pac::dma0::SETVALID0
type SETVALID0 = Reg<u32, _SETVALID0>;
Set ValidPending control bits for all DMA channels.
This register you can reset
, write
, write_with_zero
. See API.
For information about available fields see setvalid0 module
Trait Implementations
impl ResetValue for SETVALID0
[src]
Register SETVALID0 reset()
's with value 0
impl Writable for SETVALID0
[src]
write(|w| ..)
method takes setvalid0::W writer structure