[−][src]Module lpc55s6x_pac::casper
CASPER
Modules
| areg | A register |
| breg | B register |
| creg | C register |
| ctrl0 | Contains the offsets of AB and CD in the RAM. |
| ctrl1 | Contains the opcode mode, iteration count, and result offset (in RAM) and also launches the accelerator. Note: with CP version: CTRL0 and CRTL1 can be written in one go with MCRR. |
| dreg | D register |
| intenclr | Clears interrupts |
| intenset | Sets interrupts |
| intstat | Interrupt status bits (mask of INTENSET and STATUS) |
| loader | Contains an optional loader to load into CTRL0/1 in steps to perform a set of operations. |
| lock | Security lock register |
| mask | Optional mask register |
| remask | Optional re-mask register |
| res0 | Result register 0 |
| res1 | Result register 1 |
| res2 | Result register 2 |
| res3 | Result register 3 |
| status | Indicates operational status and would contain the carry bit if used. |
Structs
| RegisterBlock | Register block |
Type Definitions
| AREG | A register |
| BREG | B register |
| CREG | C register |
| CTRL0 | Contains the offsets of AB and CD in the RAM. |
| CTRL1 | Contains the opcode mode, iteration count, and result offset (in RAM) and also launches the accelerator. Note: with CP version: CTRL0 and CRTL1 can be written in one go with MCRR. |
| DREG | D register |
| INTENCLR | Clears interrupts |
| INTENSET | Sets interrupts |
| INTSTAT | Interrupt status bits (mask of INTENSET and STATUS) |
| LOADER | Contains an optional loader to load into CTRL0/1 in steps to perform a set of operations. |
| LOCK | Security lock register |
| MASK | Optional mask register |
| REMASK | Optional re-mask register |
| RES0 | Result register 0 |
| RES1 | Result register 1 |
| RES2 | Result register 2 |
| RES3 | Result register 3 |
| STATUS | Indicates operational status and would contain the carry bit if used. |