Type Definition lpc55s6x_pac::usbphy::pll_sic_set::W

type W = W<u32, PLL_SIC_SET>;

Writer for register PLL_SIC_SET

Methods

impl W

pub fn misc2_control0(&mut self) -> MISC2_CONTROL0_W

Bit 5 - Modifies the operation of the pll_sic_power_int signal

pub fn pll_en_usb_clks(&mut self) -> PLL_EN_USB_CLKS_W

Bit 6 - Enables the USB clock from PLL to USB PHY

pub fn pll_power(&mut self) -> PLL_POWER_W

Bit 12 - Power up the USB PLL

pub fn pll_enable(&mut self) -> PLL_ENABLE_W

Bit 13 - Enables the clock output from the USB PLL

pub fn pll_bypass(&mut self) -> PLL_BYPASS_W

Bit 16 - Bypass the USB PLL.

pub fn refbias_pwd_sel(&mut self) -> REFBIAS_PWD_SEL_W

Bit 19 - Reference bias power down select.

pub fn refbias_pwd(&mut self) -> REFBIAS_PWD_W

Bit 20 - Power down the reference bias This bit is only used when REFBIAS_PWD_SEL is set to 1.

pub fn pll_reg_enable(&mut self) -> PLL_REG_ENABLE_W

Bit 21 - This field controls the USB PLL regulator, set to enable the regulator

pub fn pll_div_sel(&mut self) -> PLL_DIV_SEL_W

Bits 22:24 - This field controls the USB PLL feedback loop divider

pub fn pll_lock(&mut self) -> PLL_LOCK_W

Bit 31 - USB PLL lock status indicator