Enum lpc55s6x_pac::rtc::ctrl::RTC_SUBSEC_ENA_A

pub enum RTC_SUBSEC_ENA_A {
    POWER_UP,
    POWERED_DOWN,
}

Possible values of the field RTC_SUBSEC_ENA

Variants

POWER_UP

The sub-second counter (if implemented) is disabled. This bit is cleared by a system-level POR or BOD reset as well as a by the RTC_ENA bit (bit 7 in this register). On modules not equipped with a sub-second counter, this bit will always read-back as a '0'.

POWERED_DOWN

The 32 KHz sub-second counter is enabled (if implemented). Counting commences on the start of the first one-second interval after this bit is set. Note: This bit can only be set after the RTC_ENA bit (bit 7) is set by a previous write operation. Note: The RTC sub-second counter must be re-enabled whenever the chip exits deep power-down mode.

Trait Implementations

impl Debug for RTC_SUBSEC_ENA_A

fn fmt(&self, f: &mut Formatter) -> Result

Formats the value using the given formatter.

impl PartialEq<RTC_SUBSEC_ENA_A> for RTC_SUBSEC_ENA_A

fn eq(&self, other: &RTC_SUBSEC_ENA_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use] fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl Copy for RTC_SUBSEC_ENA_A

impl From<RTC_SUBSEC_ENA_A> for bool

fn from(variant: RTC_SUBSEC_ENA_A) -> Self

Performs the conversion.

impl Clone for RTC_SUBSEC_ENA_A

fn clone(&self) -> RTC_SUBSEC_ENA_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.