[−][src]Module lpc55s6x_pac::i2c0
I2C-bus interfaces
Modules
cfg | Configuration for shared functions. |
clkdiv | Clock pre-divider for the entire I2C interface. This determines what time increments are used for the MSTTIME register, and controls some timing of the Slave function. |
id | Peripheral identification register. |
intenclr | Interrupt Enable Clear register. |
intenset | Interrupt Enable Set and read register. |
intstat | Interrupt Status register for Master, Slave, and Monitor functions. |
monrxdat | Monitor receiver data register. |
mstctl | Master control register. |
mstdat | Combined Master receiver and transmitter data register. |
msttime | Master timing configuration. |
slvadr | Slave address register. |
slvctl | Slave control register. |
slvdat | Combined Slave receiver and transmitter data register. |
slvqual0 | Slave Qualification for address 0. |
stat | Status register for Master, Slave, and Monitor functions. |
timeout | Time-out value register. |
Structs
RegisterBlock | Register block |
Type Definitions
CFG | Configuration for shared functions. |
CLKDIV | Clock pre-divider for the entire I2C interface. This determines what time increments are used for the MSTTIME register, and controls some timing of the Slave function. |
ID | Peripheral identification register. |
INTENCLR | Interrupt Enable Clear register. |
INTENSET | Interrupt Enable Set and read register. |
INTSTAT | Interrupt Status register for Master, Slave, and Monitor functions. |
MONRXDAT | Monitor receiver data register. |
MSTCTL | Master control register. |
MSTDAT | Combined Master receiver and transmitter data register. |
MSTTIME | Master timing configuration. |
SLVADR | Slave address register. |
SLVCTL | Slave control register. |
SLVDAT | Combined Slave receiver and transmitter data register. |
SLVQUAL0 | Slave Qualification for address 0. |
STAT | Status register for Master, Slave, and Monitor functions. |
TIMEOUT | Time-out value register. |