[−][src]Type Definition lpc55s6x_pac::ahb_secure_ctrl::SEC_CTRL_RAM0_MEM_RULE0
type SEC_CTRL_RAM0_MEM_RULE0 = Reg<u32, _SEC_CTRL_RAM0_MEM_RULE0>;
Security access rules for RAM0 slaves.
This register you can read, reset, write, write_with_zero, modify. See API.
For information about avaliable fields see sec_ctrl_ram0_mem_rule0 module
Trait Implementations
impl Readable for SEC_CTRL_RAM0_MEM_RULE0[src]
read() method returns sec_ctrl_ram0_mem_rule0::R reader structure
impl Writable for SEC_CTRL_RAM0_MEM_RULE0[src]
write(|w| ..) method takes sec_ctrl_ram0_mem_rule0::W writer structure
impl ResetValue for SEC_CTRL_RAM0_MEM_RULE0[src]
Register SEC_CTRL_RAM0_MEM_RULE0 reset()'s with value 0