Type Definition lpc55s6x_pac::ahb_secure_ctrl::sec_cpu_int_mask1::W

type W = W<u32, SEC_CPU_INT_MASK1>;

Writer for register SEC_CPU_INT_MASK1

Methods

impl W

pub fn gpio_int0_irq4(&mut self) -> GPIO_INT0_IRQ4_W

Bit 0 - Pin interrupt 4 or pattern match engine slice 4 interrupt.

pub fn gpio_int0_irq5(&mut self) -> GPIO_INT0_IRQ5_W

Bit 1 - Pin interrupt 5 or pattern match engine slice 5 interrupt.

pub fn gpio_int0_irq6(&mut self) -> GPIO_INT0_IRQ6_W

Bit 2 - Pin interrupt 6 or pattern match engine slice 6 interrupt.

pub fn gpio_int0_irq7(&mut self) -> GPIO_INT0_IRQ7_W

Bit 3 - Pin interrupt 7 or pattern match engine slice 7 interrupt.

pub fn ctimer2_irq(&mut self) -> CTIMER2_IRQ_W

Bit 4 - Standard counter/timer 2 interrupt.

pub fn ctimer4_irq(&mut self) -> CTIMER4_IRQ_W

Bit 5 - Standard counter/timer 4 interrupt.

pub fn os_event_timer_irq(&mut self) -> OS_EVENT_TIMER_IRQ_W

Bit 6 - OS Event Timer and OS Event Timer Wakeup interrupts

pub fn reserved0(&mut self) -> RESERVED0_W

Bit 7 - Reserved. Read value is undefined, only zero should be written.

pub fn reserved1(&mut self) -> RESERVED1_W

Bit 8 - Reserved. Read value is undefined, only zero should be written.

pub fn reserved2(&mut self) -> RESERVED2_W

Bit 9 - Reserved. Read value is undefined, only zero should be written.

pub fn sdio_irq(&mut self) -> SDIO_IRQ_W

Bit 10 - SDIO Controller interrupt.

pub fn reserved3(&mut self) -> RESERVED3_W

Bit 11 - Reserved. Read value is undefined, only zero should be written.

pub fn reserved4(&mut self) -> RESERVED4_W

Bit 12 - Reserved. Read value is undefined, only zero should be written.

pub fn reserved5(&mut self) -> RESERVED5_W

Bit 13 - Reserved. Read value is undefined, only zero should be written.

pub fn usb1_utmi_irq(&mut self) -> USB1_UTMI_IRQ_W

Bit 14 - USB High Speed Controller UTMI interrupt.

pub fn usb1_irq(&mut self) -> USB1_IRQ_W

Bit 15 - USB High Speed Controller interrupt.

pub fn usb1_needclk(&mut self) -> USB1_NEEDCLK_W

Bit 16 - USB High Speed Controller Clock request interrupt.

pub fn sec_hypervisor_call_irq(&mut self) -> SEC_HYPERVISOR_CALL_IRQ_W

Bit 17 - Secure fault Hyper Visor call interrupt.

pub fn sec_gpio_int0_irq0(&mut self) -> SEC_GPIO_INT0_IRQ0_W

Bit 18 - Secure Pin interrupt 0 or pattern match engine slice 0 interrupt.

pub fn sec_gpio_int0_irq1(&mut self) -> SEC_GPIO_INT0_IRQ1_W

Bit 19 - Secure Pin interrupt 1 or pattern match engine slice 1 interrupt.

pub fn plu_irq(&mut self) -> PLU_IRQ_W

Bit 20 - Programmable Look-Up Controller interrupt.

pub fn sec_vio_irq(&mut self) -> SEC_VIO_IRQ_W

Bit 21 - Security Violation interrupt.

pub fn sha_irq(&mut self) -> SHA_IRQ_W

Bit 22 - HASH-AES interrupt.

pub fn casper_irq(&mut self) -> CASPER_IRQ_W

Bit 23 - CASPER interrupt.

pub fn qddkey_irq(&mut self) -> QDDKEY_IRQ_W

Bit 24 - PUF interrupt.

pub fn pq_irq(&mut self) -> PQ_IRQ_W

Bit 25 - Power Quad interrupt.

pub fn sdma1_irq(&mut self) -> SDMA1_IRQ_W

Bit 26 - System DMA 1 (Secure) interrupt

pub fn lspi_hs_irq(&mut self) -> LSPI_HS_IRQ_W

Bit 27 - High Speed SPI interrupt