[][src]Type Definition lpc55s6x_pac::usbhsh::utmiplus_ulpi_debug::W

type W = W<u32, UTMIPLUS_ULPI_DEBUG>;

Writer for register UTMIPLUS_ULPI_DEBUG

Methods

impl W[src]

pub fn phy_addr(&mut self) -> PHY_ADDR_W[src]

Bits 0:7 - UTMI+ mode: Bits 3:0 are used to control VControl signal on Vendor Interface of UTMI+ ULPI mode: Bits 7:0 are used as the address when doing a register access over the ULPI interface.

pub fn phy_wdata(&mut self) -> PHY_WDATA_W[src]

Bits 8:15 - UTMI+ mode: Reserved.

pub fn phy_rdata(&mut self) -> PHY_RDATA_W[src]

Bits 16:23 - UTMI+ mode: Bits 7:0 contains the value returned by the VStatus signal on Vendor Interface of UTMI+ ULPI mode: Bits 7:0 are used for the read data when reading a value to a ULPI PHY register.

pub fn phy_rw(&mut self) -> PHY_RW_W[src]

Bit 24 - UTMI+ mode: Reserved.

pub fn phy_access(&mut self) -> PHY_ACCESS_W[src]

Bit 25 - Software writes this bit to one to start a read or write operation.

pub fn phy_mode(&mut self) -> PHY_MODE_W[src]

Bit 31 - This bit indicates if the interface between the controller is UTMI+ or ULPI 0b: UTMI+ 1b: ULPI If the hardware supports both modes, this bit is RW by SW.