Enum lpc55s6x_pac::spi0::fifotrig::RXLVLENA_A

pub enum RXLVLENA_A {
    DISABLED,
    ENABLED,
}

Possible values of the field RXLVLENA

Variants

DISABLED

Receive FIFO level does not generate a FIFO level trigger.

ENABLED

An trigger will be generated if the receive FIFO level reaches the value specified by the RXLVL field in this register.

Trait Implementations

impl Debug for RXLVLENA_A

fn fmt(&self, f: &mut Formatter) -> Result

Formats the value using the given formatter.

impl PartialEq<RXLVLENA_A> for RXLVLENA_A

fn eq(&self, other: &RXLVLENA_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

#[must_use] fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl Copy for RXLVLENA_A

impl From<RXLVLENA_A> for bool

fn from(variant: RXLVLENA_A) -> Self

Performs the conversion.

impl Clone for RXLVLENA_A

fn clone(&self) -> RXLVLENA_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.