Type Definition lpc55s6x_pac::ostimer::osevent_ctrl::W

type W = W<u32, OSEVENT_CTRL>;

Writer for register OSEVENT_CTRL

Methods

impl W

pub fn ostimer_intrflag(&mut self) -> OSTIMER_INTRFLAG_W

Bit 0 - This bit is set when a match occurs between the central 64-bit EVTIMER and the value programmed in the Match-register pair for the associated CPU This bit is cleared by writing a '1'. Writes to clear this bit are asynchronous. This should be done before a new match value is written into the MATCH_L/H registers

pub fn ostimer_intena(&mut self) -> OSTIMER_INTENA_W

Bit 1 - When this bit is '1' an interrupt/wakeup request to the Domainn processor will be asserted when the OSTIMER_INTR flag is set. When this bit is '0', interrupt/wakeup requests due to the OSTIMER_INTR flag are blocked.A separate OSEVENT_CTRL register is implemented for each CPU. Each CPU reads its own local value at the same address.