[−][src]Type Definition lpc55s6x_pac::ahb_secure_ctrl::misc_ctrl_reg::W

type W = W<u32, MISC_CTRL_REG>;

Writer for register MISC_CTRL_REG

Methods

`impl W`[src]

`pub fn write_lock(&mut self) -> WRITE_LOCK_W`[src]

Bits 0:1 - write lock.

`pub fn enable_secure_checking(&mut self) -> ENABLE_SECURE_CHECKING_W`[src]

Bits 2:3 - AHB bus matrix enable secure check.

`pub fn enable_s_priv_check(&mut self) -> ENABLE_S_PRIV_CHECK_W`[src]

Bits 4:5 - AHB bus matrix enable secure privilege check.

`pub fn enable_ns_priv_check(&mut self) -> ENABLE_NS_PRIV_CHECK_W`[src]

Bits 6:7 - AHB bus matrix enable non-secure privilege check.

`pub fn disable_violation_abort(&mut self) -> DISABLE_VIOLATION_ABORT_W`[src]

Bits 8:9 - Disable secure violation abort.

`pub fn disable_simple_master_strict_mode( &mut self ) -> DISABLE_SIMPLE_MASTER_STRICT_MODE_W`[src]

Bits 10:11 - Disable simple master strict mode.

`pub fn disable_smart_master_strict_mode( &mut self ) -> DISABLE_SMART_MASTER_STRICT_MODE_W`[src]

Bits 12:13 - Disable smart master strict mode.

`pub fn idau_all_ns(&mut self) -> IDAU_ALL_NS_W`[src]

Bits 14:15 - Disable IDAU.