[][src]Type Definition lpc55s6x_pac::syscon::presetctrl0::W

type W = W<u32, PRESETCTRL0>;

Writer for register PRESETCTRL0

Methods

impl W[src]

pub fn rom_rst(&mut self) -> ROM_RST_W[src]

Bit 1 - ROM reset control.

pub fn sram_ctrl1_rst(&mut self) -> SRAM_CTRL1_RST_W[src]

Bit 3 - SRAM Controller 1 reset control.

pub fn sram_ctrl2_rst(&mut self) -> SRAM_CTRL2_RST_W[src]

Bit 4 - SRAM Controller 2 reset control.

pub fn sram_ctrl3_rst(&mut self) -> SRAM_CTRL3_RST_W[src]

Bit 5 - SRAM Controller 3 reset control.

pub fn sram_ctrl4_rst(&mut self) -> SRAM_CTRL4_RST_W[src]

Bit 6 - SRAM Controller 4 reset control.

pub fn flash_rst(&mut self) -> FLASH_RST_W[src]

Bit 7 - Flash controller reset control.

pub fn fmc_rst(&mut self) -> FMC_RST_W[src]

Bit 8 - FMC controller reset control.

pub fn mux0_rst(&mut self) -> MUX0_RST_W[src]

Bit 11 - Input Mux 0 reset control.

pub fn iocon_rst(&mut self) -> IOCON_RST_W[src]

Bit 13 - I/O controller reset control.

pub fn gpio0_rst(&mut self) -> GPIO0_RST_W[src]

Bit 14 - GPIO0 reset control.

pub fn gpio1_rst(&mut self) -> GPIO1_RST_W[src]

Bit 15 - GPIO1 reset control.

pub fn gpio2_rst(&mut self) -> GPIO2_RST_W[src]

Bit 16 - GPIO2 reset control.

pub fn gpio3_rst(&mut self) -> GPIO3_RST_W[src]

Bit 17 - GPIO3 reset control.

pub fn pint_rst(&mut self) -> PINT_RST_W[src]

Bit 18 - Pin interrupt (PINT) reset control.

pub fn gint_rst(&mut self) -> GINT_RST_W[src]

Bit 19 - Group interrupt (GINT) reset control.

pub fn dma0_rst(&mut self) -> DMA0_RST_W[src]

Bit 20 - DMA0 reset control.

pub fn crcgen_rst(&mut self) -> CRCGEN_RST_W[src]

Bit 21 - CRCGEN reset control.

pub fn wwdt_rst(&mut self) -> WWDT_RST_W[src]

Bit 22 - Watchdog Timer reset control.

pub fn rtc_rst(&mut self) -> RTC_RST_W[src]

Bit 23 - Real Time Clock (RTC) reset control.

pub fn mailbox_rst(&mut self) -> MAILBOX_RST_W[src]

Bit 26 - Inter CPU communication Mailbox reset control.

pub fn adc_rst(&mut self) -> ADC_RST_W[src]

Bit 27 - ADC reset control.