Type Definition lpc55s6x_pac::usbphy::debug0_clr::R

type R = R<u32, DEBUG0_CLR>;

Reader of register DEBUG0_CLR

Methods

impl R

pub fn otgidpiolock(&self) -> OTGIDPIOLOCK_R

Bit 0 - Once OTG ID from STATUS_OTGID_STATUS is sampled, use this to hold the value

pub fn debug_interface_hold(&self) -> DEBUG_INTERFACE_HOLD_R

Bit 1 - Use holding registers to assist in timing for external UTMI interface.

pub fn hstpulldown(&self) -> HSTPULLDOWN_R

Bits 2:3 - This bit field selects whether to connect pulldown resistors on the USB_DP/USB_DM pins if the corresponding pulldown overdrive mode is enabled through DEBUG[5:4} Set bit 3 to value 1'b1 to connect the 15ohm pulldown on USB_DP line

pub fn enhstpulldown(&self) -> ENHSTPULLDOWN_R

Bits 4:5 - This bit field selects host pulldown overdrive mode

pub fn tx2rxcount(&self) -> TX2RXCOUNT_R

Bits 8:11 - Delay in between the end of transmit to the beginning of receive

pub fn entx2rxcount(&self) -> ENTX2RXCOUNT_R

Bit 12 - Set this bit to allow a countdown to transition in between TX and RX.

pub fn squelchresetcount(&self) -> SQUELCHRESETCOUNT_R

Bits 16:20 - Delay in between the detection of squelch to the reset of high-speed RX.

pub fn ensquelchreset(&self) -> ENSQUELCHRESET_R

Bit 24 - Set bit to allow squelch to reset high-speed receive.

pub fn squelchresetlength(&self) -> SQUELCHRESETLENGTH_R

Bits 25:28 - Duration of RESET in terms of the number of 480-MHz cycles.

pub fn host_resume_debug(&self) -> HOST_RESUME_DEBUG_R

Bit 29 - Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND = 1.

pub fn clkgate(&self) -> CLKGATE_R

Bit 30 - Gate Test Clocks