[−][src]Module lpc55s6x_pac::syscon::usb1clkctrl

USB1 clock control

Structs

AP_HS_DEV_CLK_W	Write proxy for field `AP_HS_DEV_CLK`
AP_HS_HOST_CLK_W	Write proxy for field `AP_HS_HOST_CLK`
HS_DEV_WAKEUP_N_W	Write proxy for field `HS_DEV_WAKEUP_N`
POL_HS_DEV_CLK_W	Write proxy for field `POL_HS_DEV_CLK`
POL_HS_HOST_CLK_W	Write proxy for field `POL_HS_HOST_CLK`

AP_HS_DEV_CLK_A	Possible values of the field `AP_HS_DEV_CLK`
AP_HS_HOST_CLK_A	Possible values of the field `AP_HS_HOST_CLK`
HS_DEV_WAKEUP_N_A	Possible values of the field `HS_DEV_WAKEUP_N`
POL_HS_DEV_CLK_A	Possible values of the field `POL_HS_DEV_CLK`
POL_HS_HOST_CLK_A	Possible values of the field `POL_HS_HOST_CLK`

AP_HS_DEV_CLK_R	Reader of field `AP_HS_DEV_CLK`
AP_HS_HOST_CLK_R	Reader of field `AP_HS_HOST_CLK`
HS_DEV_WAKEUP_N_R	Reader of field `HS_DEV_WAKEUP_N`
POL_HS_DEV_CLK_R	Reader of field `POL_HS_DEV_CLK`
POL_HS_HOST_CLK_R	Reader of field `POL_HS_HOST_CLK`
R	Reader of register USB1CLKCTRL
W	Writer for register USB1CLKCTRL