[−][src]Struct lpc55s6x_pac::pmc::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub resetctrl: RESETCTRL,
    pub resetcause: RESETCAUSE,
    pub bodvbat: BODVBAT,
    pub bodcore: BODCORE,
    pub fro1m: FRO1M,
    pub fro32k: FRO32K,
    pub xtal32k: XTAL32K,
    pub comp: COMP,
    pub wakeiocause: WAKEIOCAUSE,
    pub statusclk: STATUSCLK,
    pub aoreg1: AOREG1,
    pub rtcosc32k: RTCOSC32K,
    pub ostimer: OSTIMER,
    pub pdsleepcfg0: PDSLEEPCFG0,
    pub pdruncfg0: PDRUNCFG0,
    pub pdruncfgset0: PDRUNCFGSET0,
    pub pdruncfgclr0: PDRUNCFGCLR0,
    // some fields omitted
}

Register block

Fields

resetctrl: RESETCTRL

0x08 - Reset Control [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]

resetcause: RESETCAUSE

0x0c - Reset Cause register [Reset by: PoR]

bodvbat: BODVBAT

0x30 - VBAT Brown Out Dectector (BoD) control register [Reset by: PoR, Pin Reset, Software Reset]

bodcore: BODCORE

0x38 - Digital Core logic Brown Out Dectector control register [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]

fro1m: FRO1M

0x44 - 1 MHz Free Running Oscillator control register [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]

fro32k: FRO32K

0x48 - 32 KHz Free Running Oscillator (FRO) control register [Reset by: PoR, Brown Out Detectors Reset]

xtal32k: XTAL32K

0x4c - 32 KHz Crystal oscillator (XTAL) control register [Reset by: PoR, Brown Out Detectors Reset]

comp: COMP

0x50 - Analog Comparator control register [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]

wakeiocause: WAKEIOCAUSE

0x68 - Allows to identify the Wake-up I/O source from Deep Power Down mode

statusclk: STATUSCLK

0x74 - FRO and XTAL status register [Reset by: PoR, Brown Out Detectors Reset]

aoreg1: AOREG1

0x84 - General purpose always on domain data storage [Reset by: PoR, Brown Out Detectors Reset]

rtcosc32k: RTCOSC32K

0x98 - RTC 1 KHZ and 1 Hz clocks source control register [Reset by: PoR, Brown Out Detectors Reset]

ostimer: OSTIMER

0x9c - OS Timer control register [Reset by: PoR, Brown Out Detectors Reset]

pdsleepcfg0: PDSLEEPCFG0

0xb0 - Controls the power to various modules during Low Power modes - DEEP SLEEP, POWER DOWN and DEEP POWER DOWN [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Software Reset]

pdruncfg0: PDRUNCFG0

0xb8 - Controls the power to various analog blocks [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]

pdruncfgset0: PDRUNCFGSET0

0xc0 - Controls the power to various analog blocks [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]

pdruncfgclr0: PDRUNCFGCLR0

0xc8 - Controls the power to various analog blocks [Reset by: PoR, Pin Reset, Brown Out Detectors Reset, Deep Power Down Reset, Software Reset]

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