1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144
#[doc = "Reader of register SDIOCLKSEL"] pub type R = crate::R<u32, super::SDIOCLKSEL>; #[doc = "Writer for register SDIOCLKSEL"] pub type W = crate::W<u32, super::SDIOCLKSEL>; #[doc = "Register SDIOCLKSEL `reset()`'s with value 0x07"] impl crate::ResetValue for super::SDIOCLKSEL { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0x07 } } #[doc = "SDIO clock source select.\n\nValue on reset: 7"] #[derive(Clone, Copy, Debug, PartialEq)] #[repr(u8)] pub enum SEL_A { #[doc = "0: Main clock (main_clk)"] MAIN_CLOCK = 0, #[doc = "1: System PLL output (pll_clk)"] SYSTEM_PLL_OUTPUT = 1, #[doc = "2: USB PLL clock (usb_pll_clk)"] USB_PLL_CLOCK = 2, #[doc = "3: FRO 96 or 48 MHz (fro_hf)"] FRO_HF = 3, #[doc = "4: Audio PLL clock (audio_pll_clk)"] AUDIO_PLL_OUTPUT = 4, #[doc = "7: None, this may be selected in order to reduce power when no output is needed."] NONE = 7, } impl From<SEL_A> for u8 { #[inline(always)] fn from(variant: SEL_A) -> Self { variant as _ } } #[doc = "Reader of field `SEL`"] pub type SEL_R = crate::R<u8, SEL_A>; impl SEL_R { #[doc = r"Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> crate::Variant<u8, SEL_A> { use crate::Variant::*; match self.bits { 0 => Val(SEL_A::MAIN_CLOCK), 1 => Val(SEL_A::SYSTEM_PLL_OUTPUT), 2 => Val(SEL_A::USB_PLL_CLOCK), 3 => Val(SEL_A::FRO_HF), 4 => Val(SEL_A::AUDIO_PLL_OUTPUT), 7 => Val(SEL_A::NONE), i => Res(i), } } #[doc = "Checks if the value of the field is `MAIN_CLOCK`"] #[inline(always)] pub fn is_main_clock(&self) -> bool { *self == SEL_A::MAIN_CLOCK } #[doc = "Checks if the value of the field is `SYSTEM_PLL_OUTPUT`"] #[inline(always)] pub fn is_system_pll_output(&self) -> bool { *self == SEL_A::SYSTEM_PLL_OUTPUT } #[doc = "Checks if the value of the field is `USB_PLL_CLOCK`"] #[inline(always)] pub fn is_usb_pll_clock(&self) -> bool { *self == SEL_A::USB_PLL_CLOCK } #[doc = "Checks if the value of the field is `FRO_HF`"] #[inline(always)] pub fn is_fro_hf(&self) -> bool { *self == SEL_A::FRO_HF } #[doc = "Checks if the value of the field is `AUDIO_PLL_OUTPUT`"] #[inline(always)] pub fn is_audio_pll_output(&self) -> bool { *self == SEL_A::AUDIO_PLL_OUTPUT } #[doc = "Checks if the value of the field is `NONE`"] #[inline(always)] pub fn is_none(&self) -> bool { *self == SEL_A::NONE } } #[doc = "Write proxy for field `SEL`"] pub struct SEL_W<'a> { w: &'a mut W, } impl<'a> SEL_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] pub fn variant(self, variant: SEL_A) -> &'a mut W { unsafe { self.bits(variant.into()) } } #[doc = "Main clock (main_clk)"] #[inline(always)] pub fn main_clock(self) -> &'a mut W { self.variant(SEL_A::MAIN_CLOCK) } #[doc = "System PLL output (pll_clk)"] #[inline(always)] pub fn system_pll_output(self) -> &'a mut W { self.variant(SEL_A::SYSTEM_PLL_OUTPUT) } #[doc = "USB PLL clock (usb_pll_clk)"] #[inline(always)] pub fn usb_pll_clock(self) -> &'a mut W { self.variant(SEL_A::USB_PLL_CLOCK) } #[doc = "FRO 96 or 48 MHz (fro_hf)"] #[inline(always)] pub fn fro_hf(self) -> &'a mut W { self.variant(SEL_A::FRO_HF) } #[doc = "Audio PLL clock (audio_pll_clk)"] #[inline(always)] pub fn audio_pll_output(self) -> &'a mut W { self.variant(SEL_A::AUDIO_PLL_OUTPUT) } #[doc = "None, this may be selected in order to reduce power when no output is needed."] #[inline(always)] pub fn none(self) -> &'a mut W { self.variant(SEL_A::NONE) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07); self.w } } impl R { #[doc = "Bits 0:2 - SDIO clock source select."] #[inline(always)] pub fn sel(&self) -> SEL_R { SEL_R::new((self.bits & 0x07) as u8) } } impl W { #[doc = "Bits 0:2 - SDIO clock source select."] #[inline(always)] pub fn sel(&mut self) -> SEL_W { SEL_W { w: self } } }