[][src]Module lpc54606_pac::usbfsh

LPC5460x USB0 Full-speed Host controller

Modules

hcbulkcurrented

Contains the physical address of the current endpoint descriptor of the bulk list

hcbulkheaded

Contains the physical address of the first endpoint descriptor of the bulk list

hccommandstatus

This register is used to receive the commands from the Host Controller Driver (HCD)

hccontrol

Defines the operating modes of the HC

hccontrolcurrented

Contains the physical address of the current endpoint descriptor of the control list

hccontrolheaded

Contains the physical address of the first endpoint descriptor of the control list

hcdonehead

Contains the physical address of the last transfer descriptor added to the 'Done' queue

hcfminterval

Defines the bit time interval in a frame and the full speed maximum packet size which would not cause an overrun

hcfmnumber

Contains a 16-bit counter and provides the timing reference among events happening in the HC and the HCD

hcfmremaining

A 14-bit counter showing the bit time remaining in the current frame

hchcca

Contains the physical address of the host controller communication area

hcinterruptdisable

The bits in this register are used to disable corresponding bits in the HCInterruptStatus register and in turn disable that event leading to hardware interrupt

hcinterruptenable

Controls the bits in the HcInterruptStatus register and indicates which events will generate a hardware interrupt

hcinterruptstatus

Indicates the status on various events that cause hardware interrupts by setting the appropriate bits

hclsthreshold

Contains 11-bit value which is used by the HC to determine whether to commit to transfer a maximum of 8-byte LS packet before EOF

hcperiodcurrented

Contains the physical address of the current isochronous or interrupt endpoint descriptor

hcperiodicstart

Contains a programmable 14-bit value which determines the earliest time HC should start processing a periodic list

hcrevision

BCD representation of the version of the HCI specification that is implemented by the Host Controller (HC)

hcrhdescriptora

First of the two registers which describes the characteristics of the root hub

hcrhdescriptorb

Second of the two registers which describes the characteristics of the Root Hub

hcrhportstatus

Controls and reports the port events on a per-port basis

hcrhstatus

This register is divided into two parts

portmode

Controls the port if it is attached to the host block or the device block

Structs

RegisterBlock

Register block

Type Definitions

HCBULKCURRENTED

Contains the physical address of the current endpoint descriptor of the bulk list

HCBULKHEADED

Contains the physical address of the first endpoint descriptor of the bulk list

HCCOMMANDSTATUS

This register is used to receive the commands from the Host Controller Driver (HCD)

HCCONTROL

Defines the operating modes of the HC

HCCONTROLCURRENTED

Contains the physical address of the current endpoint descriptor of the control list

HCCONTROLHEADED

Contains the physical address of the first endpoint descriptor of the control list

HCDONEHEAD

Contains the physical address of the last transfer descriptor added to the 'Done' queue

HCFMINTERVAL

Defines the bit time interval in a frame and the full speed maximum packet size which would not cause an overrun

HCFMNUMBER

Contains a 16-bit counter and provides the timing reference among events happening in the HC and the HCD

HCFMREMAINING

A 14-bit counter showing the bit time remaining in the current frame

HCHCCA

Contains the physical address of the host controller communication area

HCINTERRUPTDISABLE

The bits in this register are used to disable corresponding bits in the HCInterruptStatus register and in turn disable that event leading to hardware interrupt

HCINTERRUPTENABLE

Controls the bits in the HcInterruptStatus register and indicates which events will generate a hardware interrupt

HCINTERRUPTSTATUS

Indicates the status on various events that cause hardware interrupts by setting the appropriate bits

HCLSTHRESHOLD

Contains 11-bit value which is used by the HC to determine whether to commit to transfer a maximum of 8-byte LS packet before EOF

HCPERIODCURRENTED

Contains the physical address of the current isochronous or interrupt endpoint descriptor

HCPERIODICSTART

Contains a programmable 14-bit value which determines the earliest time HC should start processing a periodic list

HCREVISION

BCD representation of the version of the HCI specification that is implemented by the Host Controller (HC)

HCRHDESCRIPTORA

First of the two registers which describes the characteristics of the root hub

HCRHDESCRIPTORB

Second of the two registers which describes the characteristics of the Root Hub

HCRHPORTSTATUS

Controls and reports the port events on a per-port basis

HCRHSTATUS

This register is divided into two parts

PORTMODE

Controls the port if it is attached to the host block or the device block