[][src]Type Definition lpc54606_pac::spifi0::stat::R

type R = R<u32, STAT>;

Reader of register STAT

Methods

impl R[src]

pub fn mcinit(&self) -> MCINIT_R[src]

Bit 0 - This bit is set when software successfully writes the Memory Command register, and is cleared by Reset or by writing a 1 to the RESET bit in this register.

pub fn cmd(&self) -> CMD_R[src]

Bit 1 - This bit is 1 when the Command register is written. It is cleared by a hardware reset, a write to the RESET bit in this register, or the deassertion of CS which indicates that the command has completed communication with the SPI Flash.

pub fn reset(&self) -> RESET_R[src]

Bit 4 - Write a 1 to this bit to abort a current command or memory mode. This bit is cleared when the hardware is ready for a new command to be written to the Command register.

pub fn intrq(&self) -> INTRQ_R[src]

Bit 5 - This bit reflects the SPIFI interrupt request. Write a 1 to this bit to clear it. This bit is set when a CMD was previously 1 and has been cleared due to the deassertion of CS.