[][src]Type Definition lpc54606_pac::sdif::CLKDIV

type CLKDIV = Reg<u32, _CLKDIV>;

Clock Divider register

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see clkdiv module

Trait Implementations

impl Readable for CLKDIV[src]

read() method returns clkdiv::R reader structure

impl ResetValue for CLKDIV[src]

Register CLKDIV reset()'s with value 0

type Type = u32

Register size

impl Writable for CLKDIV[src]

write(|w| ..) method takes clkdiv::W writer structure