[−][src]Struct lpc54606_pac::i2s0::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub fifocfg: FIFOCFG,
    pub fifostat: FIFOSTAT,
    pub fifotrig: FIFOTRIG,
    pub fifointenset: FIFOINTENSET,
    pub fifointenclr: FIFOINTENCLR,
    pub fifointstat: FIFOINTSTAT,
    pub fifowr: FIFOWR,
    pub fifowr48h: FIFOWR48H,
    pub fiford: FIFORD,
    pub fiford48h: FIFORD48H,
    pub fifordnopop: FIFORDNOPOP,
    pub fiford48hnopop: FIFORD48HNOPOP,
    pub id: ID,
    // some fields omitted
}

Register block

Fields

fifocfg: FIFOCFG

0xe00 - FIFO configuration and enable register.

fifostat: FIFOSTAT

0xe04 - FIFO status register.

fifotrig: FIFOTRIG

0xe08 - FIFO trigger settings for interrupt and DMA request.

fifointenset: FIFOINTENSET

0xe10 - FIFO interrupt enable set (enable) and read register.

fifointenclr: FIFOINTENCLR

0xe14 - FIFO interrupt enable clear (disable) and read register.

fifointstat: FIFOINTSTAT

0xe18 - FIFO interrupt status register.

fifowr: FIFOWR

0xe20 - FIFO write data.

fifowr48h: FIFOWR48H

0xe24 - FIFO write data for upper data bits. May only be used if the I2S is configured for 2x 24-bit data and not using DMA.

fiford: FIFORD

0xe30 - FIFO read data.

fiford48h: FIFORD48H

0xe34 - FIFO read data for upper data bits. May only be used if the I2S is configured for 2x 24-bit data and not using DMA.

fifordnopop: FIFORDNOPOP

0xe40 - FIFO data read with no FIFO pop.

fiford48hnopop: FIFORD48HNOPOP

0xe44 - FIFO data read for upper data bits with no FIFO pop. May only be used if the I2S is configured for 2x 24-bit data and not using DMA.

id: ID

0x1dfc - I2S Module identification

Methods

impl RegisterBlock[src]

pub fn secchannel0(&self) -> &SECCHANNEL[src]

0x00 - no description available

pub fn secchannel0_mut(&self) -> &mut SECCHANNEL[src]

0x00 - no description available

pub fn secchannel1(&self) -> &SECCHANNEL[src]

0x20 - no description available

pub fn secchannel1_mut(&self) -> &mut SECCHANNEL[src]

0x20 - no description available

pub fn secchannel2(&self) -> &SECCHANNEL[src]

0x40 - no description available

pub fn secchannel2_mut(&self) -> &mut SECCHANNEL[src]

0x40 - no description available

pub fn cfg1(&self) -> &CFG1[src]

0xc00 - Configuration register 1 for the primary channel pair.

pub fn cfg1_mut(&self) -> &mut CFG1[src]

0xc00 - Configuration register 1 for the primary channel pair.

pub fn cfg2(&self) -> &CFG2[src]

0xc04 - Configuration register 2 for the primary channel pair.

pub fn cfg2_mut(&self) -> &mut CFG2[src]

0xc04 - Configuration register 2 for the primary channel pair.

pub fn stat(&self) -> &STAT[src]

0xc08 - Status register for the primary channel pair.

pub fn stat_mut(&self) -> &mut STAT[src]

0xc08 - Status register for the primary channel pair.

pub fn div(&self) -> &DIV[src]

0xc1c - Clock divider, used by all channel pairs.

pub fn div_mut(&self) -> &mut DIV[src]

0xc1c - Clock divider, used by all channel pairs.

Auto Trait Implementations

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