Struct lpc54606_pac::i2s0::cfg1::MODE_W

pub struct MODE_W<'a> { /* fields omitted */ }

Write proxy for field MODE

Methods

impl<'a> MODE_W<'a>

pub fn variant(self, variant: MODE_A) -> &'a mut W

Writes variant to the field

pub fn classic_mode(self) -> &'a mut W

I2S mode a.k.a. 'classic' mode. WS has a 50% duty cycle, with (for each enabled channel pair) one piece of left channel data occurring during the first phase, and one pieces of right channel data occurring during the second phase. In this mode, the data region begins one clock after the leading WS edge for the frame. For a 50% WS duty cycle, FRAMELEN must define an even number of I2S clocks for the frame. If FRAMELEN defines an odd number of clocks per frame, the extra clock will occur on the right.

pub fn dsp_mode_ws_50_dutycycle(self) -> &'a mut W

DSP mode where WS has a 50% duty cycle. See remark for mode 0.

pub fn dsp_mode_ws_1_clock(self) -> &'a mut W

DSP mode where WS has a one clock long pulse at the beginning of each data frame.

pub fn dsp_mode_ws_1_data(self) -> &'a mut W

DSP mode where WS has a one data slot long pulse at the beginning of each data frame.

pub fn bits(self, value: u8) -> &'a mut W

Writes raw bits to the field