Type Definition lpc54606_pac::etm::cr::R

type R = R<u32, CR>;

Reader of register CR

Methods

impl R

pub fn etmpd(&self) -> ETMPD_R

Bit 0 - ETM power down. This bit can be used by an implementation to control if the ETM is in a low power state. This bit must be cleared by the trace software tools at the beginning of a debug session. When this bit is set to 1, writes to some registers and fields might be ignored.

pub fn ps(&self) -> PS_R

Bits 4:6 - Port size. The ETM-M4 has no influence over the external pins used for trace. These bits are implemented but not used. On an ETM reset these bits reset to 0b001.

pub fn sp(&self) -> SP_R

Bit 7 - Stall processor. The FIFOFULL output can be used to stall the processor to prevent overflow. The FIFOFULL output is only enabled when the stall processor bit is set to 1. When the bit is 0 the FIFOFULL output remains LOW at all times and the FIFO overflows if there are too many trace packets. Trace resumes without corruption once the FIFO has drained, if overflow does occur. An ETM reset sets this bit to 0.

pub fn bo(&self) -> BO_R

Bit 8 - Branch output. When set to 1 all branch addresses are output, even if the branch was because of a direct branch instruction. Setting this bit enables reconstruction of the program flow without having access to the memory image of the code being executed. When this bit is set to 1, more trace data is generated, and this may affect the performance of the trace system. Information about the execution of a branch is traced regardless of the state of this bit. An ETM reset sets this bit to 0.

pub fn drc(&self) -> DRC_R

Bit 9 - Debug request control. When set to 1 and the trigger event occurs, the DBGRQ output is asserted until DBGACK is observed. This enables the ARM processor to be forced into Debug state. An ETM reset sets this bit to 0.

pub fn etmp(&self) -> ETMP_R

Bit 10 - ETM programming. This bit must be set to 1 at the start of the ETM programming sequence. Tracing is prevented while this bit is set to 1. On an ETM reset this bit is set to b1.

pub fn etmps(&self) -> ETMPS_R

Bit 11 - ETM port selection. This bit can be used to control other trace components in an implementation. This bit must be set by the trace software tools to ensure that trace output is enabled from this ETM. An ETM reset sets this bit to 0.

pub fn pm2(&self) -> PM2_R

Bit 13 - This bit is implemented but has no function. An ETM reset sets this bit to 0.

pub fn pm(&self) -> PM_R

Bits 16:17 - These bits are implemented but have no function. An ETM reset sets these bits to 0.

pub fn ps3(&self) -> PS3_R

Bit 21 - This bit is implemented but has no function. An ETM reset sets this bit to 0.

pub fn te(&self) -> TE_R

Bit 28 - When set, this bit enables timestamping. An ETM reset sets this bit to 0.