[][src]Type Definition lpc54606_pac::enet::mtl_rxq_dma_map::R

type R = R<u32, MTL_RXQ_DMA_MAP>;

Reader of register MTL_RXQ_DMA_MAP

Methods

impl R[src]

pub fn q0mdmach(&self) -> Q0MDMACH_R[src]

Bit 0 - Queue 0 Mapped to DMA Channel This field controls the routing of the packet received in Queue 0 to the DMA channel: 0: DMA Channel 0 1: DMA Channel 1 This field is valid when the Q0DDMACH field is reset.

pub fn q0ddmach(&self) -> Q0DDMACH_R[src]

Bit 4 - Queue 0 Enabled for DA-based DMA Channel Selection When set, this bit indicates that the packets received in Queue 0 are routed to a particular DMA channel as decided in the MAC Receiver based on the DMA channel number programmed in the L3-L4 filter registers, or the Ethernet DA address.

pub fn q1mdmach(&self) -> Q1MDMACH_R[src]

Bit 8 - Queue 1 Mapped to DMA Channel This field controls the routing of the received packet in Queue 1 to the DMA channel: 0: DMA Channel 0 1: DMA Channel 1 This field is valid when the Q1DDMACH field is reset.

pub fn q1ddmach(&self) -> Q1DDMACH_R[src]

Bit 12 - Queue 1 Enabled for DA-based DMA Channel Selection When set, this bit indicates that the packets received in Queue 1 are routed to a particular DMA channel as decided in the MAC Receiver based on the DMA channel number programmed in the L3-L4 filter registers, or the Ethernet DA address.