[][src]Type Definition lpc54606_pac::enet::mtl_queue::mtl_txqx_intctrl_stat::R

type R = R<u32, MTL_TXQX_INTCTRL_STAT>;

Reader of register MTL_TXQx_INTCTRL_STAT

Methods

impl R[src]

pub fn txunfis(&self) -> TXUNFIS_R[src]

Bit 0 - Transmit Queue Underflow Interrupt Status This bit indicates that the Transmit Queue had an underflow while transmitting the packet.

pub fn abpsis(&self) -> ABPSIS_R[src]

Bit 1 - Average Bits Per Slot Interrupt Status When set, this bit indicates that the MAC has updated the ABS value.

pub fn txuie(&self) -> TXUIE_R[src]

Bit 8 - Transmit Queue Underflow Interrupt Enable When this bit is set, the Transmit Queue Underflow interrupt is enabled.

pub fn abpsie(&self) -> ABPSIE_R[src]

Bit 9 - Average Bits Per Slot Interrupt Enable When this bit is set, the MAC asserts the interrupt when the average bits per slot status is updated.

pub fn rxovfis(&self) -> RXOVFIS_R[src]

Bit 16 - Receive Queue Overflow Interrupt Status This bit indicates that the Receive Queue had an overflow while receiving the packet.

pub fn rxoie(&self) -> RXOIE_R[src]

Bit 24 - Receive Queue Overflow Interrupt Enable When this bit is set, the Receive Queue Overflow interrupt is enabled.