[][src]Type Definition lpc54606_pac::enet::mtl_queue::mtl_rxqx_op_mode::W

type W = W<u32, MTL_RXQX_OP_MODE>;

Writer for register MTL_RXQx_OP_MODE

Methods

impl W[src]

pub fn rtc(&mut self) -> RTC_W[src]

Bits 0:1 - Receive Queue Threshold Control These bits control the threshold level of the MTL Rx queue (in bytes): 00: 64 01: 32 10: 96 11: 128 The packet received is transferred to the application or DMA when the packet size within the MTL Rx queue is larger than the threshold.

pub fn fup(&mut self) -> FUP_W[src]

Bit 3 - Forward Undersized Good Packets When this bit is set, the Rx queue forwards the undersized good packets (packets with no error and length less than 64 bytes), including pad-bytes and CRC.

pub fn fep(&mut self) -> FEP_W[src]

Bit 4 - Forward Error Packets When this bit is reset, the Rx queue drops packets with error status (CRC error, Mll_ER, watchdog timeout, or overflow).

pub fn rsf(&mut self) -> RSF_W[src]

Bit 5 - Receive Queue Store and Forward When this bit is set, the ethernet block on this chip reads a packet from the Rx queue only after the complete packet has been written to it, ignoring the RTC field of this register.

pub fn dis_tcp_ef(&mut self) -> DIS_TCP_EF_W[src]

Bit 6 - Disable Dropping of TCP/IP Checksum Error Packets When this bit is set, the MAC does not drop the packets which only have the errors detected by the Receive Checksum Offload engine.

pub fn rqs(&mut self) -> RQS_W[src]

Bits 20:22 - This field indicates the size of the allocated Receive queues in blocks of 256 bytes.