Type Definition lpc54606_pac::enet::mtl_op_mode::R

type R = R<u32, MTL_OP_MODE>;

Reader of register MTL_OP_MODE

Methods

impl R

pub fn dtxsts(&self) -> DTXSTS_R

Bit 1 - Drop Transmit Status When this bit is set, the Tx packet status received from the MAC is dropped in the MTL.

pub fn raa(&self) -> RAA_R

Bit 2 - Receive Arbitration Algorithm This field is used to select the arbitration algorithm for the Rx side.

pub fn schalg(&self) -> SCHALG_R

Bits 5:6 - Tx Scheduling Algorithm This field indicates the algorithm for Tx scheduling: 0x00: WRR algorithm 0x1: Reserved 0x2: Reserved 0x3: Strict priority algorithm.

pub fn cntprst(&self) -> CNTPRST_R

Bit 8 - Counters Preset When this bit is set, MTL TxQ0 Underflow register (Table 762) and MTL_TxQ1_Underflow (Table 762) registers are initialized/preset to 0x7F0.

pub fn cntclr(&self) -> CNTCLR_R

Bit 9 - Counters Reset When this bit is set, all counters are reset.