[][src]Type Definition lpc54606_pac::enet::mac_mdio_addr::W

type W = W<u32, MAC_MDIO_ADDR>;

Writer for register MAC_MDIO_ADDR

Methods

impl W[src]

pub fn mb(&mut self) -> MB_W[src]

Bit 0 - MII busy.

pub fn moc(&mut self) -> MOC_W[src]

Bits 2:3 - MII Operation Command.

pub fn cr(&mut self) -> CR_W[src]

Bits 8:11 - CSR Clock Range.

pub fn ntc(&mut self) -> NTC_W[src]

Bits 12:14 - Number of Training Clocks This field controls the number of trailing clock cycles generated on MDC after the end of transmission of MDIO frame.

pub fn rda(&mut self) -> RDA_W[src]

Bits 16:20 - Register/Device Address These bits select the PHY register in selected PHY device.

pub fn pa(&mut self) -> PA_W[src]

Bits 21:25 - Physical Layer Address This field indicates which PHY devices (out of 32 devices) the MAC is accessing.

pub fn btb(&mut self) -> BTB_W[src]

Bit 26 - Back to Back transactions When this bit is set and the NTC has value greater than 0, then the MAC will inform the completion of a read or write command at the end of frame transfer (before the trailing clocks are transmitted).

pub fn pse(&mut self) -> PSE_W[src]

Bit 27 - Preamble Suppression Enable When this bit is set, the SMA will suppress the 32-bit preamble and transmit MDIO frames with only 1 preamble bit.