[][src]Type Definition lpc54606_pac::enet::mac_config::W

type W = W<u32, MAC_CONFIG>;

Writer for register MAC_CONFIG

Methods

impl W[src]

pub fn re(&mut self) -> RE_W[src]

Bit 0 - Receiver Enable When this bit is set, the receiver state machine of the MAC is enabled for receiving frames from the MII.

pub fn te(&mut self) -> TE_W[src]

Bit 1 - Transmitter Enable When this bit is set, the transmit state machine of the MAC is enabled for transmission on the MII.

pub fn prelen(&mut self) -> PRELEN_W[src]

Bits 2:3 - Preamble Length for Transmit packets These bits control the number of preamble bytes that are added to the beginning of every Tx packet.

pub fn dc(&mut self) -> DC_W[src]

Bit 4 - Deferral Check When this bit is set, the deferral check function is enabled in the MAC.

pub fn bl(&mut self) -> BL_W[src]

Bits 5:6 - Back-Off Limit The Back-Off limit determines the random integer number (r) of slot time delays (4,096 bit times for 1000 Mbps and 512 bit times for 10/100 Mbps) the MAC waits before rescheduling a transmission attempt during retries after a collision.

pub fn dr(&mut self) -> DR_W[src]

Bit 8 - Disable Retry When this bit is set, the MAC will attempt only one transmission.

pub fn dcrs(&mut self) -> DCRS_W[src]

Bit 9 - Disable Carrier Sense During Transmission When this bit is set, the MAC transmitter ignores the MII CRS signal during packet transmission in the half-duplex mode.

pub fn do_(&mut self) -> DO_W[src]

Bit 10 - Disable Receive Own When this bit is set, the MAC disables the reception of frames when the gmii_txen_o is asserted in Half-Duplex mode.

pub fn ecrsfd(&mut self) -> ECRSFD_W[src]

Bit 11 - Enable Carrier Sense Before Transmission in Full-Duplex Mode When this bit is set, the MAC transmitter checks the CRS signal before packet transmission in the full-duplex mode.

pub fn lm(&mut self) -> LM_W[src]

Bit 12 - Loopback Mode When this bit is set, the MAC operates in loopback mode at MII.

pub fn dm(&mut self) -> DM_W[src]

Bit 13 - Duplex Mode When this bit is set, the MAC operates in a Full-Duplex mode where it can transmit and receive simultaneously.

pub fn fes(&mut self) -> FES_W[src]

Bit 14 - Speed Indicates the speed in Fast Ethernet (MII) mode: This bit is reserved (RO) by default and is enabled only when RMII/SMII is enabled during configuration.

pub fn je(&mut self) -> JE_W[src]

Bit 16 - Jumbo Frame Enable When this bit is set, MAC allows Jumbo frames of 9,018 bytes (9,022 bytes for tagged frames) without reporting a giant frame error in the receive frame status.

pub fn jd(&mut self) -> JD_W[src]

Bit 17 - Jabber Disable When this bit is set, the MAC disables the jabber timer on the transmitter, and can transfer frames of up to 16,384 bytes.

pub fn be(&mut self) -> BE_W[src]

Bit 18 - Packet Burst Enable When this bit is set, the MAC allows packet bursting during transmission in the MII half-duplex mode.

pub fn wd(&mut self) -> WD_W[src]

Bit 19 - Watchdog Disable When this bit is set, the MAC disables the watchdog timer on the receiver, and can receive frames of up to 16,384 bytes.

pub fn acs(&mut self) -> ACS_W[src]

Bit 20 - Automatic Pad or CRC Stripping When this bit is set, the MAC strips the Pad or FCS field on the incoming packets only if the value of the length field is less than 1,536 bytes.

pub fn cst(&mut self) -> CST_W[src]

Bit 21 - CRC stripping for Type packets When this bit is set, the last four bytes (FCS) of all packets of Ether type (type field greater than 1,536) are stripped and dropped before forwarding the packet to the application.

pub fn s2kp(&mut self) -> S2KP_W[src]

Bit 22 - IEEE 802.

pub fn gpslce(&mut self) -> GPSLCE_W[src]

Bit 23 - Giant Packet Size Limit Control Enable When this bit is set, the MAC considers the value in GPSL field in MAC Ext Configuration register to declare a received packet as Giant packet.

pub fn ipg(&mut self) -> IPG_W[src]

Bits 24:26 - Inter-Packet Gap These bits control the minimum IPG between packets during transmission.

pub fn ipc(&mut self) -> IPC_W[src]

Bit 27 - Checksum Offload When set, this bit enables the IPv4 header checksum checking and IPv4 or IPv6 TCP, UDP, or ICMP payload checksum checking.