[−][src]Type Definition lpc54606_pac::enet::dma_mode::W
type W = W<u32, DMA_MODE>;
Writer for register DMA_MODE
Methods
impl W
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pub fn swr(&mut self) -> SWR_W
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Bit 0 - Software Reset When this bit is set, the MAC and the OMA controller reset the logic and all internal registers of the OMA, MTL, and MAC.
pub fn da(&mut self) -> DA_W
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Bit 1 - DMA Tx or Rx Arbitration Scheme This bit specifies the arbitration scheme between the Transmit and Receive paths of all channels: The Tx path has priority over the Rx path when the TXPR bit is set.
pub fn taa(&mut self) -> TAA_W
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Bits 2:4 - Transmit Arbitration Algorithm This field is used to select the arbitration algorithm for the Transmit side when multiple Tx DMAs are selected.
pub fn txpr(&mut self) -> TXPR_W
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Bit 11 - Transmit Priority When set, this bit indicates that the Tx DMA has higher priority than the Rx DMA during arbitration for the system-side bus.
pub fn pr(&mut self) -> PR_W
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Bits 12:14 - Priority Ratio These bits control the priority ratio in weighted round-robin arbitration between the Rx DMA and Tx DMA.