[][src]Type Definition lpc54606_pac::enet::dma_ch::dma_chx_int_en::R

type R = R<u32, DMA_CHX_INT_EN>;

Reader of register DMA_CHx_INT_EN

Methods

impl R[src]

pub fn tie(&self) -> TIE_R[src]

Bit 0 - Transmit interrupt enable When this bit is set with Normal Interrupt Summary Enable (bit 16 in this register), Transmit Interrupt is enabled.

pub fn tse(&self) -> TSE_R[src]

Bit 1 - Transmit stopped enable When this bit is set with Abnormal Interrupt Summary Enable (bit 15 in this register), Transmission Stopped Interrupt is enabled.

pub fn tbue(&self) -> TBUE_R[src]

Bit 2 - Transmit buffer unavailable enable When this bit is set with Normal Interrupt Summary Enable (bit 16 in this register), Transmit Buffer Unavailable Interrupt is enabled.

pub fn rie(&self) -> RIE_R[src]

Bit 6 - Receive interrupt enable When this bit is set with Normal Interrupt Summary Enable (bit 16 in this register), Receive Interrupt is enabled.

pub fn rbue(&self) -> RBUE_R[src]

Bit 7 - Receive buffer unavailable enable When this bit is set with Abnormal Interrupt Summary Enable (bit 15 in this register), Receive Buffer Unavailable Interrupt is enabled.

pub fn rse(&self) -> RSE_R[src]

Bit 8 - Received stopped enable When this bit is set with Abnormal Interrupt Summary Enable (bit 15 in this register), Receive Stopped Interrupt is enabled.

pub fn rwte(&self) -> RWTE_R[src]

Bit 9 - Receive watchdog timeout enable When this bit is set with Abnormal Interrupt Summary Enable (bit 15 in this register), the Receive Watchdog Timeout Interrupt is enabled.

pub fn etie(&self) -> ETIE_R[src]

Bit 10 - Early transmit interrupt enable When this bit is set with an Abnormal Interrupt Summary Enable (bit 15 in this register), Early Transmit Interrupt is enabled.

pub fn erie(&self) -> ERIE_R[src]

Bit 11 - Early receive interrupt enable When this bit is set with Normal Interrupt Summary Enable (bit 16 in this register), Early Receive Interrupt is enabled.

pub fn fbee(&self) -> FBEE_R[src]

Bit 12 - Fatal bus error enable When this bit is set with Abnormal Interrupt Summary Enable (bit 15 in this register), the Fatal Bus Error Interrupt is enabled.

pub fn aie(&self) -> AIE_R[src]

Bit 14 - Abnormal interrupt summary enable When this bit is set, an Abnormal Interrupt summary is enabled.

pub fn nie(&self) -> NIE_R[src]

Bit 15 - Normal interrupt summary enable When this bit is set, a normal interrupt is enabled.