Type Definition lpc54606_pac::ctimer0::ccr::W

type W = W<u32, CCR>;

Writer for register CCR

Methods

impl W

pub fn cap0re(&mut self) -> CAP0RE_W

Bit 0 - Rising edge of capture channel 0: a sequence of 0 then 1 causes CR0 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap0fe(&mut self) -> CAP0FE_W

Bit 1 - Falling edge of capture channel 0: a sequence of 1 then 0 causes CR0 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap0i(&mut self) -> CAP0I_W

Bit 2 - Generate interrupt on channel 0 capture event: a CR0 load generates an interrupt.

pub fn cap1re(&mut self) -> CAP1RE_W

Bit 3 - Rising edge of capture channel 1: a sequence of 0 then 1 causes CR1 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap1fe(&mut self) -> CAP1FE_W

Bit 4 - Falling edge of capture channel 1: a sequence of 1 then 0 causes CR1 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap1i(&mut self) -> CAP1I_W

Bit 5 - Generate interrupt on channel 1 capture event: a CR1 load generates an interrupt.

pub fn cap2re(&mut self) -> CAP2RE_W

Bit 6 - Rising edge of capture channel 2: a sequence of 0 then 1 causes CR2 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap2fe(&mut self) -> CAP2FE_W

Bit 7 - Falling edge of capture channel 2: a sequence of 1 then 0 causes CR2 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap2i(&mut self) -> CAP2I_W

Bit 8 - Generate interrupt on channel 2 capture event: a CR2 load generates an interrupt.

pub fn cap3re(&mut self) -> CAP3RE_W

Bit 9 - Rising edge of capture channel 3: a sequence of 0 then 1 causes CR3 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap3fe(&mut self) -> CAP3FE_W

Bit 10 - Falling edge of capture channel 3: a sequence of 1 then 0 causes CR3 to be loaded with the contents of TC. 0 = disabled. 1 = enabled.

pub fn cap3i(&mut self) -> CAP3I_W

Bit 11 - Generate interrupt on channel 3 capture event: a CR3 load generates an interrupt.