[−][src]Module lpc54606_pac::adc0::inten

ADC Interrupt Enable register. This register contains enable bits that enable the sequence-A, sequence-B, threshold compare and data overrun interrupts to be generated.

Structs

ADCMPINTEN0_W	Write proxy for field `ADCMPINTEN0`
ADCMPINTEN1_W	Write proxy for field `ADCMPINTEN1`
ADCMPINTEN2_W	Write proxy for field `ADCMPINTEN2`
ADCMPINTEN3_W	Write proxy for field `ADCMPINTEN3`
ADCMPINTEN4_W	Write proxy for field `ADCMPINTEN4`
ADCMPINTEN5_W	Write proxy for field `ADCMPINTEN5`
ADCMPINTEN6_W	Write proxy for field `ADCMPINTEN6`
ADCMPINTEN7_W	Write proxy for field `ADCMPINTEN7`
ADCMPINTEN8_W	Write proxy for field `ADCMPINTEN8`
ADCMPINTEN9_W	Write proxy for field `ADCMPINTEN9`
ADCMPINTEN10_W	Write proxy for field `ADCMPINTEN10`
ADCMPINTEN11_W	Write proxy for field `ADCMPINTEN11`
OVR_INTEN_W	Write proxy for field `OVR_INTEN`
SEQA_INTEN_W	Write proxy for field `SEQA_INTEN`
SEQB_INTEN_W	Write proxy for field `SEQB_INTEN`

Enums

ADCMPINTEN0_A	Threshold comparison interrupt enable for channel 0.
OVR_INTEN_A	Overrun interrupt enable.
SEQA_INTEN_A	Sequence A interrupt enable.
SEQB_INTEN_A	Sequence B interrupt enable.

Type Definitions

ADCMPINTEN0_R	Reader of field `ADCMPINTEN0`
ADCMPINTEN1_R	Reader of field `ADCMPINTEN1`
ADCMPINTEN2_R	Reader of field `ADCMPINTEN2`
ADCMPINTEN3_R	Reader of field `ADCMPINTEN3`
ADCMPINTEN4_R	Reader of field `ADCMPINTEN4`
ADCMPINTEN5_R	Reader of field `ADCMPINTEN5`
ADCMPINTEN6_R	Reader of field `ADCMPINTEN6`
ADCMPINTEN7_R	Reader of field `ADCMPINTEN7`
ADCMPINTEN8_R	Reader of field `ADCMPINTEN8`
ADCMPINTEN9_R	Reader of field `ADCMPINTEN9`
ADCMPINTEN10_R	Reader of field `ADCMPINTEN10`
ADCMPINTEN11_R	Reader of field `ADCMPINTEN11`
OVR_INTEN_R	Reader of field `OVR_INTEN`
R	Reader of register INTEN
SEQA_INTEN_R	Reader of field `SEQA_INTEN`
SEQB_INTEN_R	Reader of field `SEQB_INTEN`
W	Writer for register INTEN