[−][src]Struct lpc54606_pac::adc0::ctrl::ASYNMODE_W
Write proxy for field ASYNMODE
Methods
impl<'a> ASYNMODE_W<'a>
[src]
pub fn variant(self, variant: ASYNMODE_A) -> &'a mut W
[src]
Writes variant
to the field
pub fn synchronous_mode(self) -> &'a mut W
[src]
Synchronous mode. The ADC clock is derived from the system clock based on the divide value selected in the CLKDIV field. The ADC clock will be started in a controlled fashion in response to a trigger to eliminate any uncertainty in the launching of an ADC conversion in response to any synchronous (on-chip) trigger. In Synchronous mode with the SYNCBYPASS bit (in a sequence control register) set, sampling of the ADC input and start of conversion will initiate 2 system clocks after the leading edge of a (synchronous) trigger pulse.
pub fn asynchronous_mode(self) -> &'a mut W
[src]
Asynchronous mode. The ADC clock is based on the output of the ADC clock divider ADCCLKSEL in the SYSCON block.
pub fn set_bit(self) -> &'a mut W
[src]
Sets the field bit
pub fn clear_bit(self) -> &'a mut W
[src]
Clears the field bit
pub fn bit(self, value: bool) -> &'a mut W
[src]
Writes raw bits to the field
Auto Trait Implementations
Blanket Implementations
impl<T> Any for T where
T: 'static + ?Sized,
[src]
T: 'static + ?Sized,
impl<T> Borrow<T> for T where
T: ?Sized,
[src]
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
[src]
T: ?Sized,
fn borrow_mut(&mut self) -> &mut T
[src]
impl<T> From<T> for T
[src]
impl<T, U> Into<U> for T where
U: From<T>,
[src]
U: From<T>,
impl<T> Same<T> for T
type Output = T
Should always be Self
impl<T, U> TryFrom<U> for T where
U: Into<T>,
[src]
U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
[src]
impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
[src]
U: TryFrom<T>,