Struct lpc177x_8x::adc::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock { pub cr: CR, pub gdr: GDR, pub inten: INTEN, pub dr: [DR; 8], pub stat: STAT, pub trm: TRM, // some fields omitted }
Register block
Fields
cr: CR
0x00 - A/D Control Register. The ADCR register must be written to select the operating mode before A/D conversion can occur.
gdr: GDR
0x04 - A/D Global Data Register. This register contains the ADC's DONE bit and the result of the most recent A/D conversion.
inten: INTEN
0x0c - A/D Interrupt Enable Register. This register contains enable bits that allow the DONE flag of each A/D channel to be included or excluded from contributing to the generation of an A/D interrupt.
dr: [DR; 8]
0x10 - A/D Channel 0 Data Register. This register contains the result of the most recent conversion completed on channel 0.
stat: STAT
0x30 - A/D Status Register. This register contains DONE and OVERRUN flags for all of the A/D channels, as well as the A/D interrupt/DMA flag.
trm: TRM
0x34 - ADC trim register.
Auto Trait Implementations
impl Send for RegisterBlock
impl Send for RegisterBlock
impl !Sync for RegisterBlock
impl !Sync for RegisterBlock