[][src]Struct lpc11xx::UART

pub struct UART { /* fields omitted */ }

Universal Asynchronous Receiver/Transmitter

Methods

impl UART[src]

pub const fn ptr() -> *const RegisterBlock[src]

Returns a pointer to the register block

Methods from Deref<Target = RegisterBlock>

pub fn dll(&self) -> &DLL[src]

0x00 - Divisor Latch LSB. Least significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider. Available when the divisor latches are enabled

pub fn dll_mut(&self) -> &mut DLL[src]

0x00 - Divisor Latch LSB. Least significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider. Available when the divisor latches are enabled

pub fn thr(&self) -> &THR[src]

0x00 - Transmit Holding Register. The next character to be transmitted is written here. Available when the divisor latches are disabled

pub fn thr_mut(&self) -> &mut THR[src]

0x00 - Transmit Holding Register. The next character to be transmitted is written here. Available when the divisor latches are disabled

pub fn rbr(&self) -> &RBR[src]

0x00 - Receiver Buffer Register. Contains the next received character to be read. Available when the divisor latches are disabled

pub fn rbr_mut(&self) -> &mut RBR[src]

0x00 - Receiver Buffer Register. Contains the next received character to be read. Available when the divisor latches are disabled

pub fn ier(&self) -> &IER[src]

0x04 - Interrupt Enable Register. Contains individual interrupt enable bits for the 7 potential UART interrupts. Available when the divisor latches are disabled

pub fn ier_mut(&self) -> &mut IER[src]

0x04 - Interrupt Enable Register. Contains individual interrupt enable bits for the 7 potential UART interrupts. Available when the divisor latches are disabled

pub fn dlm(&self) -> &DLM[src]

0x04 - Divisor Latch MSB. Most significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider. Available when the divisor latches are enabled

pub fn dlm_mut(&self) -> &mut DLM[src]

0x04 - Divisor Latch MSB. Most significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider. Available when the divisor latches are enabled

pub fn fcr(&self) -> &FCR[src]

0x08 - FIFO Control Register. Controls UART FIFO usage and modes

pub fn fcr_mut(&self) -> &mut FCR[src]

0x08 - FIFO Control Register. Controls UART FIFO usage and modes

pub fn iir(&self) -> &IIR[src]

0x08 - Interrupt ID Register. Identifies which interrupt(s) are pending

pub fn iir_mut(&self) -> &mut IIR[src]

0x08 - Interrupt ID Register. Identifies which interrupt(s) are pending

Trait Implementations

impl Deref for UART[src]

type Target = RegisterBlock

The resulting type after dereferencing.

impl Send for UART[src]

Auto Trait Implementations

impl Unpin for UART

impl !Sync for UART

Blanket Implementations

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> Into<U> for T where
    U: From<T>, 
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impl<T> From<T> for T[src]

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T> Borrow<T> for T where
    T: ?Sized
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impl<T> BorrowMut<T> for T where
    T: ?Sized
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impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Same<T> for T

type Output = T

Should always be Self