Struct libftd2xx_cc1101::CC1101[][src]

pub struct CC1101<'f, Ft: FtdiCommon> { /* fields omitted */ }
Expand description

Interface endpoint for CC1101.

References open ftdi handle and keeps cached CC1101 registers.

Implementations

Constructs a CC1101 interface from an open Ftdi device.

Example

use libftd2xx::{Ft232h, Ftdi, FtdiMpsse, MpsseSettings};
use libftd2xx_cc1101::CC1101;
use std::convert::TryInto;
use std::time::Duration;

let ft = Ftdi::new().expect("unable to Ftdi::new");
let mut ftdi: Ft232h = ft.try_into().expect("not a Ft232h");
const SETTINGS: MpsseSettings = MpsseSettings {
    reset: true,
    in_transfer_size: 4096,
    read_timeout: Duration::from_secs(1),
    write_timeout: Duration::from_secs(1),
    latency_timer: Duration::from_millis(16),
    mask: 0xb,
    clock_frequency: Some(1_000_000),
};
ftdi.initialize_mpsse(&SETTINGS)
    .expect("unable to initialize mpsse");

let mut cc1101 = CC1101::new(&mut ftdi);

Initialize the CC1101 with default register values.

Initialize the CC1101 with user-specified register values.

Example

use libftd2xx_cc1101::regs::{ModFormat, SyncMode};

cc1101
    .initialize(|regs, pa_table| {
        regs.set_freq(1093805); // 433.943634 MHz
        regs.set_mdmcfg3(regs.mdmcfg3().with_drate_m(0x67)); // 2.2254 kBaud
        regs.set_mdmcfg2(
            regs.mdmcfg2()
                .with_mod_format(ModFormat::AskOok)
                .with_sync_mode(SyncMode::None),
        );
        *pa_table = [0, 0x60, 0, 0, 0, 0, 0, 0]; // 0dBm OOK
    })
    .expect("unable to initialize cc1101");

Create a new RXFIFO reader.

The BUF_CAP const generic parameter is used to balance between access latency and frequency of underlying I/O operations depending on application. It must be in 1..=64.

Example

let mut cc1101_reader = cc1101.reader::<32>();
let mut buf = [0_u8; 32];
cc1101_reader
    .read_exact(&mut buf)
    .expect("unable to read_exact");
println!("{:?}", buf);

Create a new TXFIFO writer.

The BUF_CAP const generic parameter is used to balance between access latency and frequency of underlying I/O operations depending on application. It must be in 1..=64.

Example

let mut cc1101_writer = cc1101.writer::<32>();
cc1101_writer
    .write_all(&[11, 22, 33, 44])
    .expect("unable to write_all");
cc1101_writer.flush().expect("unable to flush");

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