Module kea_hal::spi [−][src]
Expand description
SPI Peripheral
Pins
The SPI0 peripheral has two choices for its I/O pins (SCK, MOSI, MISO, CS), PTB2:5 or PTE0:3. SPI1 only uses one set of pins (PTD0:3).
At this time there is no method implemented to return Pins from the SPI peripherals. Keep in mind that once the pins given to the SPI they can not be returned.
High Drive Current GPIO
The SPI peripheral, like other peripherals in this family of MCUs will reconfigure the GPIO ports as needed when the peripheral is activated. However, the SPI peripherals do not modify the High Drive Current peripheral’s settings. This provides stronger drive to the SPI bus lines in order to increase the slew rate for the output signal.
Note that only the MOSI (sdo in controller mode) pin for SPI0 and SPI1 with the default pins and MISO (sdo in peripheral mode) for SPI0 with alternate pins have the high current drive peripheral implemented.
See the spi-talking-to-myself example in the source repo.
Interrupts
SPI peripherals have one interrupt vector, 4 flags, and 3 masks each. Once in the interrupt you will have to check the flag bits to determine which flag triggered the interrupt in order to respond appropriately.
Structs
Peripheral is using alternate pins
Holds the parameters used to calculate the divisor used to derive the SPI baudrate from the bus clock
SPI Peripheral in Controller mode
Peripheral uses default pins (or only has one set of pins available)
Peripheral disabled
Peripheral ignores this sub-state at this time
Peripheral enabled
SPI Peripheral in Peripheral mode
Spi Peripheral Interface
Enums
Errors used in Result types in this module