[][src]Module ke06z4_pac::sim

System Integration Module

Modules

clkdiv

Clock Divider Register

pinsel0

Pin Selection Register 0

pinsel1

Pin Selection Register 1

scgc

System Clock Gating Control Register

sopt0

System Options Register 0

sopt1

System Options Register

srsid

System Reset Status and ID Register

uuidl

Universally Unique Identifier Low Register

uuidmh

Universally Unique Identifier Middle High Register

uuidml

Universally Unique Identifier Middle Low Register

Structs

RegisterBlock

Register block

Type Definitions

CLKDIV

Clock Divider Register

PINSEL0

Pin Selection Register 0

PINSEL1

Pin Selection Register 1

SCGC

System Clock Gating Control Register

SOPT0

System Options Register 0

SOPT1

System Options Register

SRSID

System Reset Status and ID Register

UUIDL

Universally Unique Identifier Low Register

UUIDMH

Universally Unique Identifier Middle High Register

UUIDML

Universally Unique Identifier Middle Low Register