[][src]Type Definition k210_pac::sysctl::CLK_SEL0

type CLK_SEL0 = Reg<u32, _CLK_SEL0>;

Clock select controller 0

This register you can read, reset, write, write_with_zero, modify. See API.

For information about avaliable fields see clk_sel0 module

Trait Implementations

impl Readable for CLK_SEL0[src]

read() method returns clk_sel0::R reader structure

impl Writable for CLK_SEL0[src]

write(|w| ..) method takes clk_sel0::W writer structure

impl ResetValue for CLK_SEL0[src]

Register clk_sel0 reset()'s with value 0

type Type = u32

Register size