[][src]Module k210_pac::sysctl

System Controller

Modules

clk_en_cent

Central clock enable

clk_en_peri

Peripheral clock enable

clk_freq

System clock base frequency

clk_sel0

Clock select controller 0

clk_sel1

Clock select controller 1

clk_th0

Clock threshold controller 0

clk_th1

Clock threshold controller 1

clk_th2

Clock threshold controller 2

clk_th3

Clock threshold controller 3

clk_th4

Clock threshold controller 4

clk_th5

Clock threshold controller 5

clk_th6

Clock threshold controller 6

dma_sel0

DMA handshake selector

dma_sel1

DMA handshake selector

git_id

Git short commit id

misc

Miscellaneous controller

peri

Peripheral controller

peri_reset

Peripheral reset controller

pll0

PLL0 controller

pll1

PLL1 controller

pll2

PLL2 controller

pll_lock

PLL lock tester

power_sel

IO Power Mode Select controller

reset_status

Reset source status

rom_error

AXI ROM detector

soft_reset

Soft reset ctrl

spi_sleep

SPI sleep controller

Structs

RegisterBlock

Register block

Type Definitions

CLK_EN_CENT

Central clock enable

CLK_EN_PERI

Peripheral clock enable

CLK_FREQ

System clock base frequency

CLK_SEL0

Clock select controller 0

CLK_SEL1

Clock select controller 1

CLK_TH0

Clock threshold controller 0

CLK_TH1

Clock threshold controller 1

CLK_TH2

Clock threshold controller 2

CLK_TH3

Clock threshold controller 3

CLK_TH4

Clock threshold controller 4

CLK_TH5

Clock threshold controller 5

CLK_TH6

Clock threshold controller 6

DMA_SEL0

DMA handshake selector

DMA_SEL1

DMA handshake selector

GIT_ID

Git short commit id

MISC

Miscellaneous controller

PERI

Peripheral controller

PERI_RESET

Peripheral reset controller

PLL0

PLL0 controller

PLL1

PLL1 controller

PLL2

PLL2 controller

PLL_LOCK

PLL lock tester

POWER_SEL

IO Power Mode Select controller

RESET_STATUS

Reset source status

ROM_ERROR

AXI ROM detector

SOFT_RESET

Soft reset ctrl

SPI_SLEEP

SPI sleep controller