[][src]Module k1921vk01t_pac::nt_ethernet

ETHERNET controller registers

Modules

clrt

Register collision window

dmaint

Interrupt register

dmaintmask

Mask interrupt register

dmarx_ctrl

Control receive register

dmarx_descriptor

Pointer receive descriptor register

dmarx_status

Status receiving register

dmatx_ctrl

Reception control register

dmatx_descriptor

Reception descriptor pointer register

dmatx_status

Status transmission register

fifocfg

MIIFIFO configurate register

ipgr

Register Non-Back-to-Back Inter-Packet-Gap

ipgt

Register Back-to-Back Inter-Packet-Gap

mac1

MAC configuration register 1

mac2

MAC configuration register 2

madr

MII address register

maxf

Register the upper limit size Frame

mcfg

Configuration control register MII

mcmd

Command register MII

mind

MII status register flags

mrdd

Register read data from MII

mwtd

Register data written in MII

sa0

Station address register 0

sa1

Station address register 1

sa2

Station address register 2

smii

MII controller status register

supp

Register PHY-support interface

Structs

RegisterBlock

Register block

Type Definitions

CLRT

Register collision window

DMAINT

Interrupt register

DMAINTMASK

Mask interrupt register

DMARXCTRL

Control receive register

DMARXDESCRIPTOR

Pointer receive descriptor register

DMARXSTATUS

Status receiving register

DMATXCTRL

Reception control register

DMATXDESCRIPTOR

Reception descriptor pointer register

DMATXSTATUS

Status transmission register

FIFOCFG

MIIFIFO configurate register

IPGR

Register Non-Back-to-Back Inter-Packet-Gap

IPGT

Register Back-to-Back Inter-Packet-Gap

MAC1

MAC configuration register 1

MAC2

MAC configuration register 2

MADR

MII address register

MAXF

Register the upper limit size Frame

MCFG

Configuration control register MII

MCMD

Command register MII

MIND

MII status register flags

MRDD

Register read data from MII

MWTD

Register data written in MII

SA0

Station address register 0

SA1

Station address register 1

SA2

Station address register 2

SMII

MII controller status register

SUPP

Register PHY-support interface