pub enum TargetISA {
Show 21 variants Host, SSE2i32x4, SSE2i32x8, SSE4i32x4, SSE4i32x8, SSE4i16x8, SSE4i8x16, AVX1i32x4, AVX1i32x8, AVX1i32x16, AVX1i64x4, AVX2i32x8, AVX2i32x16, AVX2i64x4, AVX512KNLi32x16, AVX512SKXi32x16, AVX512SKXi32x8, Neoni8x16, Neoni16x8, Neoni32x4, Neoni32x8,
}
Expand description

Target instruction sets and vector widths available to specialize for. The default if none is set will be the host CPU’s ISA and vector width.

Variants

Host

SSE2i32x4

SSE2i32x8

SSE4i32x4

SSE4i32x8

SSE4i16x8

SSE4i8x16

AVX1i32x4

AVX1i32x8

AVX1i32x16

AVX1i64x4

AVX2i32x8

AVX2i32x16

AVX2i64x4

AVX512KNLi32x16

AVX512SKXi32x16

AVX512SKXi32x8

Neoni8x16

Neoni16x8

Neoni32x4

Neoni32x8

Implementations

Trait Implementations

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Performs the conversion.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.