[][src]Struct imxrt1062_trng::R

pub struct R<U, T> { /* fields omitted */ }

Register/field reader

Result of the read method of a register. Also it can be used in the modify method

Methods

impl<U, T> R<U, T> where
    U: Copy
[src]

pub fn bits(&self) -> U[src]

Read raw bits from register/field

impl<FI> R<bool, FI>[src]

pub fn bit(&self) -> bool[src]

Value of the field as raw bits

pub fn bit_is_clear(&self) -> bool[src]

Returns true if the bit is clear (0)

pub fn bit_is_set(&self) -> bool[src]

Returns true if the bit is set (1)

impl R<u8, SAMP_MODE_A>[src]

pub fn variant(&self) -> SAMP_MODE_A[src]

Get enumerated values variant

pub fn is_samp_mode_0(&self) -> bool[src]

Checks if the value of the field is SAMP_MODE_0

pub fn is_samp_mode_1(&self) -> bool[src]

Checks if the value of the field is SAMP_MODE_1

pub fn is_samp_mode_2(&self) -> bool[src]

Checks if the value of the field is SAMP_MODE_2

pub fn is_samp_mode_3(&self) -> bool[src]

Checks if the value of the field is SAMP_MODE_3

impl R<u8, OSC_DIV_A>[src]

pub fn variant(&self) -> OSC_DIV_A[src]

Get enumerated values variant

pub fn is_osc_div_0(&self) -> bool[src]

Checks if the value of the field is OSC_DIV_0

pub fn is_osc_div_1(&self) -> bool[src]

Checks if the value of the field is OSC_DIV_1

pub fn is_osc_div_2(&self) -> bool[src]

Checks if the value of the field is OSC_DIV_2

pub fn is_osc_div_3(&self) -> bool[src]

Checks if the value of the field is OSC_DIV_3

impl R<u32, Reg<u32, _MCTL>>[src]

pub fn samp_mode(&self) -> SAMP_MODE_R[src]

Bits 0:1 - Sample Mode

pub fn osc_div(&self) -> OSC_DIV_R[src]

Bits 2:3 - Oscillator Divide

pub fn unused4(&self) -> UNUSED4_R[src]

Bit 4 - This bit is unused. Always reads zero.

pub fn unused5(&self) -> UNUSED5_R[src]

Bit 5 - This bit is unused. Always reads zero.

pub fn for_sclk(&self) -> FOR_SCLK_R[src]

Bit 7 - Force System Clock

pub fn fct_fail(&self) -> FCT_FAIL_R[src]

Bit 8 - Read only: Frequency Count Fail

pub fn fct_val(&self) -> FCT_VAL_R[src]

Bit 9 - Read only: Frequency Count Valid. Indicates that a valid frequency count may be read from FRQCNT.

pub fn ent_val(&self) -> ENT_VAL_R[src]

Bit 10 - Read only: Entropy Valid

pub fn tst_out(&self) -> TST_OUT_R[src]

Bit 11 - Read only: Test point inside ring oscillator.

pub fn err(&self) -> ERR_R[src]

Bit 12 - Read: Error status

pub fn tstop_ok(&self) -> TSTOP_OK_R[src]

Bit 13 - TRNG_OK_TO_STOP

pub fn lrun_cont(&self) -> LRUN_CONT_R[src]

Bit 14 - Long run count continues between entropy generations

pub fn prgm(&self) -> PRGM_R[src]

Bit 16 - Programming Mode Select

impl R<u32, Reg<u32, _SCMISC>>[src]

pub fn lrun_max(&self) -> LRUN_MAX_R[src]

Bits 0:7 - LONG RUN MAX LIMIT

pub fn rty_ct(&self) -> RTY_CT_R[src]

Bits 16:19 - RETRY COUNT

impl R<u32, Reg<u32, _PKRRNG>>[src]

pub fn pkr_rng(&self) -> PKR_RNG_R[src]

Bits 0:15 - Poker Range

impl R<u32, Reg<u32, _PKRMAX>>[src]

pub fn pkr_max(&self) -> PKR_MAX_R[src]

Bits 0:23 - Poker Maximum Limit.

impl R<u32, Reg<u32, _PKRSQ>>[src]

pub fn pkr_sq(&self) -> PKR_SQ_R[src]

Bits 0:23 - Poker Square Calculation Result.

impl R<u32, Reg<u32, _SDCTL>>[src]

pub fn samp_size(&self) -> SAMP_SIZE_R[src]

Bits 0:15 - Sample Size

pub fn ent_dly(&self) -> ENT_DLY_R[src]

Bits 16:31 - Entropy Delay

impl R<u32, Reg<u32, _SBLIM>>[src]

pub fn sb_lim(&self) -> SB_LIM_R[src]

Bits 0:9 - Sparse Bit Limit

impl R<u32, Reg<u32, _TOTSAM>>[src]

pub fn tot_sam(&self) -> TOT_SAM_R[src]

Bits 0:19 - Total Samples

impl R<u32, Reg<u32, _FRQMIN>>[src]

pub fn frq_min(&self) -> FRQ_MIN_R[src]

Bits 0:21 - Frequency Count Minimum Limit

impl R<u32, Reg<u32, _FRQCNT>>[src]

pub fn frq_ct(&self) -> FRQ_CT_R[src]

Bits 0:21 - Frequency Count

impl R<u32, Reg<u32, _FRQMAX>>[src]

pub fn frq_max(&self) -> FRQ_MAX_R[src]

Bits 0:21 - Frequency Counter Maximum Limit

impl R<u32, Reg<u32, _SCMC>>[src]

pub fn mono_ct(&self) -> MONO_CT_R[src]

Bits 0:15 - Monobit Count

impl R<u32, Reg<u32, _SCML>>[src]

pub fn mono_max(&self) -> MONO_MAX_R[src]

Bits 0:15 - Monobit Maximum Limit

pub fn mono_rng(&self) -> MONO_RNG_R[src]

Bits 16:31 - Monobit Range

impl R<u32, Reg<u32, _SCR1C>>[src]

pub fn r1_0_ct(&self) -> R1_0_CT_R[src]

Bits 0:14 - Runs of Zero, Length 1 Count

pub fn r1_1_ct(&self) -> R1_1_CT_R[src]

Bits 16:30 - Runs of One, Length 1 Count

impl R<u32, Reg<u32, _SCR1L>>[src]

pub fn run1_max(&self) -> RUN1_MAX_R[src]

Bits 0:14 - Run Length 1 Maximum Limit

pub fn run1_rng(&self) -> RUN1_RNG_R[src]

Bits 16:30 - Run Length 1 Range

impl R<u32, Reg<u32, _SCR2C>>[src]

pub fn r2_0_ct(&self) -> R2_0_CT_R[src]

Bits 0:13 - Runs of Zero, Length 2 Count

pub fn r2_1_ct(&self) -> R2_1_CT_R[src]

Bits 16:29 - Runs of One, Length 2 Count

impl R<u32, Reg<u32, _SCR2L>>[src]

pub fn run2_max(&self) -> RUN2_MAX_R[src]

Bits 0:13 - Run Length 2 Maximum Limit

pub fn run2_rng(&self) -> RUN2_RNG_R[src]

Bits 16:29 - Run Length 2 Range

impl R<u32, Reg<u32, _SCR3C>>[src]

pub fn r3_0_ct(&self) -> R3_0_CT_R[src]

Bits 0:12 - Runs of Zeroes, Length 3 Count

pub fn r3_1_ct(&self) -> R3_1_CT_R[src]

Bits 16:28 - Runs of Ones, Length 3 Count

impl R<u32, Reg<u32, _SCR3L>>[src]

pub fn run3_max(&self) -> RUN3_MAX_R[src]

Bits 0:12 - Run Length 3 Maximum Limit

pub fn run3_rng(&self) -> RUN3_RNG_R[src]

Bits 16:28 - Run Length 3 Range

impl R<u32, Reg<u32, _SCR4C>>[src]

pub fn r4_0_ct(&self) -> R4_0_CT_R[src]

Bits 0:11 - Runs of Zero, Length 4 Count

pub fn r4_1_ct(&self) -> R4_1_CT_R[src]

Bits 16:27 - Runs of One, Length 4 Count

impl R<u32, Reg<u32, _SCR4L>>[src]

pub fn run4_max(&self) -> RUN4_MAX_R[src]

Bits 0:11 - Run Length 4 Maximum Limit

pub fn run4_rng(&self) -> RUN4_RNG_R[src]

Bits 16:27 - Run Length 4 Range

impl R<u32, Reg<u32, _SCR5C>>[src]

pub fn r5_0_ct(&self) -> R5_0_CT_R[src]

Bits 0:10 - Runs of Zero, Length 5 Count

pub fn r5_1_ct(&self) -> R5_1_CT_R[src]

Bits 16:26 - Runs of One, Length 5 Count

impl R<u32, Reg<u32, _SCR5L>>[src]

pub fn run5_max(&self) -> RUN5_MAX_R[src]

Bits 0:10 - Run Length 5 Maximum Limit

pub fn run5_rng(&self) -> RUN5_RNG_R[src]

Bits 16:26 - Run Length 5 Range

impl R<u32, Reg<u32, _SCR6PC>>[src]

pub fn r6p_0_ct(&self) -> R6P_0_CT_R[src]

Bits 0:10 - Runs of Zero, Length 6+ Count

pub fn r6p_1_ct(&self) -> R6P_1_CT_R[src]

Bits 16:26 - Runs of One, Length 6+ Count

impl R<u32, Reg<u32, _SCR6PL>>[src]

pub fn run6p_max(&self) -> RUN6P_MAX_R[src]

Bits 0:10 - Run Length 6+ Maximum Limit

pub fn run6p_rng(&self) -> RUN6P_RNG_R[src]

Bits 16:26 - Run Length 6+ Range

impl R<u32, Reg<u32, _STATUS>>[src]

pub fn tf1br0(&self) -> TF1BR0_R[src]

Bit 0 - Test Fail, 1-Bit Run, Sampling 0s. If TF1BR0=1, the 1-Bit Run, Sampling 0s Test has failed.

pub fn tf1br1(&self) -> TF1BR1_R[src]

Bit 1 - Test Fail, 1-Bit Run, Sampling 1s. If TF1BR1=1, the 1-Bit Run, Sampling 1s Test has failed.

pub fn tf2br0(&self) -> TF2BR0_R[src]

Bit 2 - Test Fail, 2-Bit Run, Sampling 0s. If TF2BR0=1, the 2-Bit Run, Sampling 0s Test has failed.

pub fn tf2br1(&self) -> TF2BR1_R[src]

Bit 3 - Test Fail, 2-Bit Run, Sampling 1s. If TF2BR1=1, the 2-Bit Run, Sampling 1s Test has failed.

pub fn tf3br0(&self) -> TF3BR0_R[src]

Bit 4 - Test Fail, 3-Bit Run, Sampling 0s. If TF3BR0=1, the 3-Bit Run, Sampling 0s Test has failed.

pub fn tf3br1(&self) -> TF3BR1_R[src]

Bit 5 - Test Fail, 3-Bit Run, Sampling 1s. If TF3BR1=1, the 3-Bit Run, Sampling 1s Test has failed.

pub fn tf4br0(&self) -> TF4BR0_R[src]

Bit 6 - Test Fail, 4-Bit Run, Sampling 0s. If TF4BR0=1, the 4-Bit Run, Sampling 0s Test has failed.

pub fn tf4br1(&self) -> TF4BR1_R[src]

Bit 7 - Test Fail, 4-Bit Run, Sampling 1s. If TF4BR1=1, the 4-Bit Run, Sampling 1s Test has failed.

pub fn tf5br0(&self) -> TF5BR0_R[src]

Bit 8 - Test Fail, 5-Bit Run, Sampling 0s. If TF5BR0=1, the 5-Bit Run, Sampling 0s Test has failed.

pub fn tf5br1(&self) -> TF5BR1_R[src]

Bit 9 - Test Fail, 5-Bit Run, Sampling 1s. If TF5BR1=1, the 5-Bit Run, Sampling 1s Test has failed.

pub fn tf6pbr0(&self) -> TF6PBR0_R[src]

Bit 10 - Test Fail, 6 Plus Bit Run, Sampling 0s

pub fn tf6pbr1(&self) -> TF6PBR1_R[src]

Bit 11 - Test Fail, 6 Plus Bit Run, Sampling 1s

pub fn tfsb(&self) -> TFSB_R[src]

Bit 12 - Test Fail, Sparse Bit. If TFSB=1, the Sparse Bit Test has failed.

pub fn tflr(&self) -> TFLR_R[src]

Bit 13 - Test Fail, Long Run. If TFLR=1, the Long Run Test has failed.

pub fn tfp(&self) -> TFP_R[src]

Bit 14 - Test Fail, Poker. If TFP=1, the Poker Test has failed.

pub fn tfmb(&self) -> TFMB_R[src]

Bit 15 - Test Fail, Mono Bit. If TFMB=1, the Mono Bit Test has failed.

pub fn retry_ct(&self) -> RETRY_CT_R[src]

Bits 16:19 - RETRY COUNT

impl R<u32, Reg<u32, _ENT>>[src]

pub fn ent(&self) -> ENT_R[src]

Bits 0:31 - Entropy Value

impl R<u32, Reg<u32, _PKRCNT10>>[src]

pub fn pkr_0_ct(&self) -> PKR_0_CT_R[src]

Bits 0:15 - Poker 0h Count

pub fn pkr_1_ct(&self) -> PKR_1_CT_R[src]

Bits 16:31 - Poker 1h Count

impl R<u32, Reg<u32, _PKRCNT32>>[src]

pub fn pkr_2_ct(&self) -> PKR_2_CT_R[src]

Bits 0:15 - Poker 2h Count

pub fn pkr_3_ct(&self) -> PKR_3_CT_R[src]

Bits 16:31 - Poker 3h Count

impl R<u32, Reg<u32, _PKRCNT54>>[src]

pub fn pkr_4_ct(&self) -> PKR_4_CT_R[src]

Bits 0:15 - Poker 4h Count

pub fn pkr_5_ct(&self) -> PKR_5_CT_R[src]

Bits 16:31 - Poker 5h Count

impl R<u32, Reg<u32, _PKRCNT76>>[src]

pub fn pkr_6_ct(&self) -> PKR_6_CT_R[src]

Bits 0:15 - Poker 6h Count

pub fn pkr_7_ct(&self) -> PKR_7_CT_R[src]

Bits 16:31 - Poker 7h Count

impl R<u32, Reg<u32, _PKRCNT98>>[src]

pub fn pkr_8_ct(&self) -> PKR_8_CT_R[src]

Bits 0:15 - Poker 8h Count

pub fn pkr_9_ct(&self) -> PKR_9_CT_R[src]

Bits 16:31 - Poker 9h Count

impl R<u32, Reg<u32, _PKRCNTBA>>[src]

pub fn pkr_a_ct(&self) -> PKR_A_CT_R[src]

Bits 0:15 - Poker Ah Count

pub fn pkr_b_ct(&self) -> PKR_B_CT_R[src]

Bits 16:31 - Poker Bh Count

impl R<u32, Reg<u32, _PKRCNTDC>>[src]

pub fn pkr_c_ct(&self) -> PKR_C_CT_R[src]

Bits 0:15 - Poker Ch Count

pub fn pkr_d_ct(&self) -> PKR_D_CT_R[src]

Bits 16:31 - Poker Dh Count

impl R<u32, Reg<u32, _PKRCNTFE>>[src]

pub fn pkr_e_ct(&self) -> PKR_E_CT_R[src]

Bits 0:15 - Poker Eh Count

pub fn pkr_f_ct(&self) -> PKR_F_CT_R[src]

Bits 16:31 - Poker Fh Count

impl R<bool, NO_PRGM_A>[src]

pub fn variant(&self) -> NO_PRGM_A[src]

Get enumerated values variant

pub fn is_no_prgm_0(&self) -> bool[src]

Checks if the value of the field is NO_PRGM_0

pub fn is_no_prgm_1(&self) -> bool[src]

Checks if the value of the field is NO_PRGM_1

impl R<u32, Reg<u32, _SEC_CFG>>[src]

pub fn unused0(&self) -> UNUSED0_R[src]

Bit 0 - This bit is unused. Ignore.

pub fn no_prgm(&self) -> NO_PRGM_R[src]

Bit 1 - If set, the TRNG registers cannot be programmed

pub fn unused2(&self) -> UNUSED2_R[src]

Bit 2 - This bit is unused. Ignore.

impl R<bool, HW_ERR_A>[src]

pub fn variant(&self) -> HW_ERR_A[src]

Get enumerated values variant

pub fn is_hw_err_0(&self) -> bool[src]

Checks if the value of the field is HW_ERR_0

pub fn is_hw_err_1(&self) -> bool[src]

Checks if the value of the field is HW_ERR_1

impl R<bool, ENT_VAL_A>[src]

pub fn variant(&self) -> ENT_VAL_A[src]

Get enumerated values variant

pub fn is_ent_val_0(&self) -> bool[src]

Checks if the value of the field is ENT_VAL_0

pub fn is_ent_val_1(&self) -> bool[src]

Checks if the value of the field is ENT_VAL_1

impl R<bool, FRQ_CT_FAIL_A>[src]

pub fn variant(&self) -> FRQ_CT_FAIL_A[src]

Get enumerated values variant

pub fn is_frq_ct_fail_0(&self) -> bool[src]

Checks if the value of the field is FRQ_CT_FAIL_0

pub fn is_frq_ct_fail_1(&self) -> bool[src]

Checks if the value of the field is FRQ_CT_FAIL_1

impl R<u32, Reg<u32, _INT_CTRL>>[src]

pub fn hw_err(&self) -> HW_ERR_R[src]

Bit 0 - Bit position that can be cleared if corresponding bit of INT_STATUS register has been asserted.

pub fn ent_val(&self) -> ENT_VAL_R[src]

Bit 1 - Same behavior as bit 0 of this register.

pub fn frq_ct_fail(&self) -> FRQ_CT_FAIL_R[src]

Bit 2 - Same behavior as bit 0 of this register.

impl R<bool, HW_ERR_A>[src]

pub fn variant(&self) -> HW_ERR_A[src]

Get enumerated values variant

pub fn is_hw_err_0(&self) -> bool[src]

Checks if the value of the field is HW_ERR_0

pub fn is_hw_err_1(&self) -> bool[src]

Checks if the value of the field is HW_ERR_1

impl R<bool, ENT_VAL_A>[src]

pub fn variant(&self) -> ENT_VAL_A[src]

Get enumerated values variant

pub fn is_ent_val_0(&self) -> bool[src]

Checks if the value of the field is ENT_VAL_0

pub fn is_ent_val_1(&self) -> bool[src]

Checks if the value of the field is ENT_VAL_1

impl R<bool, FRQ_CT_FAIL_A>[src]

pub fn variant(&self) -> FRQ_CT_FAIL_A[src]

Get enumerated values variant

pub fn is_frq_ct_fail_0(&self) -> bool[src]

Checks if the value of the field is FRQ_CT_FAIL_0

pub fn is_frq_ct_fail_1(&self) -> bool[src]

Checks if the value of the field is FRQ_CT_FAIL_1

impl R<u32, Reg<u32, _INT_MASK>>[src]

pub fn hw_err(&self) -> HW_ERR_R[src]

Bit 0 - Bit position that can be cleared if corresponding bit of INT_STATUS has been asserted.

pub fn ent_val(&self) -> ENT_VAL_R[src]

Bit 1 - Same behavior as bit 0 of this register.

pub fn frq_ct_fail(&self) -> FRQ_CT_FAIL_R[src]

Bit 2 - Same behavior as bit 0 of this register.

impl R<bool, HW_ERR_A>[src]

pub fn variant(&self) -> HW_ERR_A[src]

Get enumerated values variant

pub fn is_hw_err_0(&self) -> bool[src]

Checks if the value of the field is HW_ERR_0

pub fn is_hw_err_1(&self) -> bool[src]

Checks if the value of the field is HW_ERR_1

impl R<bool, ENT_VAL_A>[src]

pub fn variant(&self) -> ENT_VAL_A[src]

Get enumerated values variant

pub fn is_ent_val_0(&self) -> bool[src]

Checks if the value of the field is ENT_VAL_0

pub fn is_ent_val_1(&self) -> bool[src]

Checks if the value of the field is ENT_VAL_1

impl R<bool, FRQ_CT_FAIL_A>[src]

pub fn variant(&self) -> FRQ_CT_FAIL_A[src]

Get enumerated values variant

pub fn is_frq_ct_fail_0(&self) -> bool[src]

Checks if the value of the field is FRQ_CT_FAIL_0

pub fn is_frq_ct_fail_1(&self) -> bool[src]

Checks if the value of the field is FRQ_CT_FAIL_1

impl R<u32, Reg<u32, _INT_STATUS>>[src]

pub fn hw_err(&self) -> HW_ERR_R[src]

Bit 0 - Read: Error status

pub fn ent_val(&self) -> ENT_VAL_R[src]

Bit 1 - Read only: Entropy Valid

pub fn frq_ct_fail(&self) -> FRQ_CT_FAIL_R[src]

Bit 2 - Read only: Frequency Count Fail

impl R<u8, MIN_REV_A>[src]

pub fn variant(&self) -> Variant<u8, MIN_REV_A>[src]

Get enumerated values variant

pub fn is_min_rev_0(&self) -> bool[src]

Checks if the value of the field is MIN_REV_0

impl R<u8, MAJ_REV_A>[src]

pub fn variant(&self) -> Variant<u8, MAJ_REV_A>[src]

Get enumerated values variant

pub fn is_maj_rev_1(&self) -> bool[src]

Checks if the value of the field is MAJ_REV_1

impl R<u16, IP_ID_A>[src]

pub fn variant(&self) -> Variant<u16, IP_ID_A>[src]

Get enumerated values variant

pub fn is_ip_id_48(&self) -> bool[src]

Checks if the value of the field is IP_ID_48

impl R<u32, Reg<u32, _VID1>>[src]

pub fn min_rev(&self) -> MIN_REV_R[src]

Bits 0:7 - Shows the IP's Minor revision of the TRNG.

pub fn maj_rev(&self) -> MAJ_REV_R[src]

Bits 8:15 - Shows the IP's Major revision of the TRNG.

pub fn ip_id(&self) -> IP_ID_R[src]

Bits 16:31 - Shows the IP ID.

impl R<u8, CONFIG_OPT_A>[src]

pub fn variant(&self) -> Variant<u8, CONFIG_OPT_A>[src]

Get enumerated values variant

pub fn is_config_opt_0(&self) -> bool[src]

Checks if the value of the field is CONFIG_OPT_0

impl R<u8, ECO_REV_A>[src]

pub fn variant(&self) -> Variant<u8, ECO_REV_A>[src]

Get enumerated values variant

pub fn is_eco_rev_0(&self) -> bool[src]

Checks if the value of the field is ECO_REV_0

impl R<u8, INTG_OPT_A>[src]

pub fn variant(&self) -> Variant<u8, INTG_OPT_A>[src]

Get enumerated values variant

pub fn is_intg_opt_0(&self) -> bool[src]

Checks if the value of the field is INTG_OPT_0

impl R<u8, ERA_A>[src]

pub fn variant(&self) -> Variant<u8, ERA_A>[src]

Get enumerated values variant

pub fn is_era_0(&self) -> bool[src]

Checks if the value of the field is ERA_0

impl R<u32, Reg<u32, _VID2>>[src]

pub fn config_opt(&self) -> CONFIG_OPT_R[src]

Bits 0:7 - Shows the IP's Configuaration options for the TRNG.

pub fn eco_rev(&self) -> ECO_REV_R[src]

Bits 8:15 - Shows the IP's ECO revision of the TRNG.

pub fn intg_opt(&self) -> INTG_OPT_R[src]

Bits 16:23 - Shows the integration options for the TRNG.

pub fn era(&self) -> ERA_R[src]

Bits 24:31 - Shows the compile options for the TRNG.

Trait Implementations

impl<U, T, FI> PartialEq<FI> for R<U, T> where
    U: PartialEq,
    FI: Copy + Into<U>, 
[src]

Auto Trait Implementations

impl<U, T> Send for R<U, T> where
    T: Send,
    U: Send

impl<U, T> Sync for R<U, T> where
    T: Sync,
    U: Sync

impl<U, T> Unpin for R<U, T> where
    T: Unpin,
    U: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.