[][src]Enum imxrt1062_snvs::hpsicr::LPSVI_EN_A

pub enum LPSVI_EN_A {
    LPSVI_EN_0,
    LPSVI_EN_1,
}

LP Security Violation Interrupt Enable This bit enables generating of the security interrupt to the host processor upon security violation signal from the LP section

Value on reset: 0

Variants

LPSVI_EN_0

0: LP Security Violation Interrupt is Disabled

LPSVI_EN_1

1: LP Security Violation Interrupt is Enabled

Trait Implementations

impl Clone for LPSVI_EN_A[src]

impl Copy for LPSVI_EN_A[src]

impl Debug for LPSVI_EN_A[src]

impl From<LPSVI_EN_A> for bool[src]

impl PartialEq<LPSVI_EN_A> for LPSVI_EN_A[src]

impl StructuralPartialEq for LPSVI_EN_A[src]

Auto Trait Implementations

impl Send for LPSVI_EN_A

impl Sync for LPSVI_EN_A

impl Unpin for LPSVI_EN_A

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.