[−][src]Type Definition imxrt1062_pmu::misc0_set::W
type W = W<u32, MISC0_SET>;
Writer for register MISC0_SET
Methods
impl W
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pub fn reftop_pwd(&mut self) -> REFTOP_PWD_W
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Bit 0 - Control bit to power-down the analog bandgap reference circuitry
pub fn reftop_selfbiasoff(&mut self) -> REFTOP_SELFBIASOFF_W
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Bit 3 - Control bit to disable the self-bias circuit in the analog bandgap
pub fn reftop_vbgadj(&mut self) -> REFTOP_VBGADJ_W
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Bits 4:6 - no description available
pub fn reftop_vbgup(&mut self) -> REFTOP_VBGUP_W
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Bit 7 - Status bit that signals the analog bandgap voltage is up and stable. 1 - Stable.
pub fn stop_mode_config(&mut self) -> STOP_MODE_CONFIG_W
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Bits 10:11 - Configure the analog behavior in stop mode.
pub fn discon_high_snvs(&mut self) -> DISCON_HIGH_SNVS_W
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Bit 12 - This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.
pub fn osc_i(&mut self) -> OSC_I_W
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Bits 13:14 - This field determines the bias current in the 24MHz oscillator
pub fn osc_xtalok_en(&mut self) -> OSC_XTALOK_EN_W
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Bit 16 - This bit enables the detector that signals when the 24MHz crystal oscillator is stable
pub fn clkgate_ctrl(&mut self) -> CLKGATE_CTRL_W
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Bit 25 - This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block
pub fn clkgate_delay(&mut self) -> CLKGATE_DELAY_W
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Bits 26:28 - This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block
pub fn xtal_24m_pwd(&mut self) -> XTAL_24M_PWD_W
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Bit 30 - This field powers down the 24M crystal oscillator if set true.
pub fn vid_pll_prediv(&mut self) -> VID_PLL_PREDIV_W
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Bit 31 - Predivider for the source clock of the PLL's.