[][src]Type Definition imxrt1062_lcdif::ctrl1_clr::R

type R = R<u32, CTRL1_CLR>;

Reader of register CTRL1_CLR

Methods

impl R[src]

pub fn vsync_edge_irq(&self) -> VSYNC_EDGE_IRQ_R[src]

Bit 8 - This bit is set to indicate that an interrupt is requested by the LCDIF block

pub fn cur_frame_done_irq(&self) -> CUR_FRAME_DONE_IRQ_R[src]

Bit 9 - This bit is set to indicate that an interrupt is requested by the LCDIF block

pub fn underflow_irq(&self) -> UNDERFLOW_IRQ_R[src]

Bit 10 - This bit is set to indicate that an interrupt is requested by the LCDIF block

pub fn overflow_irq(&self) -> OVERFLOW_IRQ_R[src]

Bit 11 - This bit is set to indicate that an interrupt is requested by the LCDIF block

pub fn vsync_edge_irq_en(&self) -> VSYNC_EDGE_IRQ_EN_R[src]

Bit 12 - This bit is set to enable an interrupt every time the hardware encounters the leading VSYNC edge in the VSYNC and DOTCLK modes, or the beginning of every field in DVI mode

pub fn cur_frame_done_irq_en(&self) -> CUR_FRAME_DONE_IRQ_EN_R[src]

Bit 13 - This bit is set to 1 enable an interrupt every time the hardware enters in the vertical blanking state

pub fn underflow_irq_en(&self) -> UNDERFLOW_IRQ_EN_R[src]

Bit 14 - This bit is set to enable an underflow interrupt in the TXFIFO in the write mode.

pub fn overflow_irq_en(&self) -> OVERFLOW_IRQ_EN_R[src]

Bit 15 - This bit is set to enable an overflow interrupt in the TXFIFO in the write mode.

pub fn byte_packing_format(&self) -> BYTE_PACKING_FORMAT_R[src]

Bits 16:19 - This bitfield is used to show which data bytes in a 32-bit word are valid

pub fn irq_on_alternate_fields(&self) -> IRQ_ON_ALTERNATE_FIELDS_R[src]

Bit 20 - If this bit is set, the LCDIF block will assert the cur_frame_done interrupt only on alternate fields, otherwise it will issue the interrupt on both odd and even field

pub fn fifo_clear(&self) -> FIFO_CLEAR_R[src]

Bit 21 - Set this bit to clear all the data in the latency FIFO (LFIFO), TXFIFO and the RXFIFO.

pub fn start_interlace_from_second_field(
    &self
) -> START_INTERLACE_FROM_SECOND_FIELD_R
[src]

Bit 22 - The default is to grab the odd lines first and then the even lines

pub fn interlace_fields(&self) -> INTERLACE_FIELDS_R[src]

Bit 23 - Set this bit if it is required that the LCDIF block fetches odd lines in one field and even lines in the other field

pub fn recover_on_underflow(&self) -> RECOVER_ON_UNDERFLOW_R[src]

Bit 24 - Set this bit to enable the LCDIF block to recover in the next field/frame if there was an underflow in the current field/frame

pub fn bm_error_irq(&self) -> BM_ERROR_IRQ_R[src]

Bit 25 - This bit is set to indicate that an interrupt is requested by the LCDIF block

pub fn bm_error_irq_en(&self) -> BM_ERROR_IRQ_EN_R[src]

Bit 26 - This bit is set to enable bus master error interrupt in the LCDIF master mode.

pub fn cs_out_select(&self) -> CS_OUT_SELECT_R[src]

Bit 30 - This bit is CS0/CS1 valid select signals

pub fn image_data_select(&self) -> IMAGE_DATA_SELECT_R[src]

Bit 31 - Command Mode MIPI image data select bit