[−][src]Module imxrt1062_iomuxc_gpr::gpr1

GPR1 General Purpose Register

Structs

CM7_FORCE_HCLK_EN_W	Write proxy for field `CM7_FORCE_HCLK_EN`
ENET1_CLK_SEL_W	Write proxy for field `ENET1_CLK_SEL`
ENET1_TX_CLK_DIR_W	Write proxy for field `ENET1_TX_CLK_DIR`
ENET2_CLK_SEL_W	Write proxy for field `ENET2_CLK_SEL`
ENET2_TX_CLK_DIR_W	Write proxy for field `ENET2_TX_CLK_DIR`
ENET_IPG_CLK_S_EN_W	Write proxy for field `ENET_IPG_CLK_S_EN`
EXC_MON_W	Write proxy for field `EXC_MON`
GINT_W	Write proxy for field `GINT`
SAI1_MCLK_DIR_W	Write proxy for field `SAI1_MCLK_DIR`
SAI2_MCLK_DIR_W	Write proxy for field `SAI2_MCLK_DIR`
SAI3_MCLK_DIR_W	Write proxy for field `SAI3_MCLK_DIR`
SAI1_MCLK1_SEL_W	Write proxy for field `SAI1_MCLK1_SEL`
SAI1_MCLK2_SEL_W	Write proxy for field `SAI1_MCLK2_SEL`
SAI1_MCLK3_SEL_W	Write proxy for field `SAI1_MCLK3_SEL`
SAI2_MCLK3_SEL_W	Write proxy for field `SAI2_MCLK3_SEL`
SAI3_MCLK3_SEL_W	Write proxy for field `SAI3_MCLK3_SEL`
USB_EXP_MODE_W	Write proxy for field `USB_EXP_MODE`

CM7_FORCE_HCLK_EN_A	ARM CM7 platform AHB clock enable
ENET1_CLK_SEL_A	ENET1 reference clock mode select.
ENET1_TX_CLK_DIR_A	ENET1_TX_CLK data direction control
ENET2_CLK_SEL_A	ENET2 reference clock mode select.
ENET2_TX_CLK_DIR_A	ENET2_TX_CLK data direction control
ENET_IPG_CLK_S_EN_A	ENET and ENET2 ipg_clk_s clock gating enable
EXC_MON_A	Exclusive monitor response select of illegal command
GINT_A	Global interrupt "0" bit (connected to ARM M7 IRQ#0 and GPC)
SAI1_MCLK_DIR_A	sai1.MCLK signal direction control
SAI2_MCLK_DIR_A	sai2.MCLK signal direction control
SAI3_MCLK_DIR_A	sai3.MCLK signal direction control
SAI1_MCLK1_SEL_A	SAI1 MCLK1 source select
SAI1_MCLK2_SEL_A	SAI1 MCLK2 source select
SAI1_MCLK3_SEL_A	SAI1 MCLK3 source select
SAI2_MCLK3_SEL_A	SAI2 MCLK3 source select
SAI3_MCLK3_SEL_A	SAI3 MCLK3 source select
USB_EXP_MODE_A	USB Exposure mode

CM7_FORCE_HCLK_EN_R	Reader of field `CM7_FORCE_HCLK_EN`
ENET1_CLK_SEL_R	Reader of field `ENET1_CLK_SEL`
ENET1_TX_CLK_DIR_R	Reader of field `ENET1_TX_CLK_DIR`
ENET2_CLK_SEL_R	Reader of field `ENET2_CLK_SEL`
ENET2_TX_CLK_DIR_R	Reader of field `ENET2_TX_CLK_DIR`
ENET_IPG_CLK_S_EN_R	Reader of field `ENET_IPG_CLK_S_EN`
EXC_MON_R	Reader of field `EXC_MON`
GINT_R	Reader of field `GINT`
R	Reader of register GPR1
SAI1_MCLK_DIR_R	Reader of field `SAI1_MCLK_DIR`
SAI2_MCLK_DIR_R	Reader of field `SAI2_MCLK_DIR`
SAI3_MCLK_DIR_R	Reader of field `SAI3_MCLK_DIR`
SAI1_MCLK1_SEL_R	Reader of field `SAI1_MCLK1_SEL`
SAI1_MCLK2_SEL_R	Reader of field `SAI1_MCLK2_SEL`
SAI1_MCLK3_SEL_R	Reader of field `SAI1_MCLK3_SEL`
SAI2_MCLK3_SEL_R	Reader of field `SAI2_MCLK3_SEL`
SAI3_MCLK3_SEL_R	Reader of field `SAI3_MCLK3_SEL`
USB_EXP_MODE_R	Reader of field `USB_EXP_MODE`
W	Writer for register GPR1